{"diffoscope-json-version": 1, "source1": "/srv/reproducible-results/rbuild-debian/r-b-build.a4nzNEFo/b1/rdma-core_50.0-2_amd64.changes", "source2": "/srv/reproducible-results/rbuild-debian/r-b-build.a4nzNEFo/b2/rdma-core_50.0-2_amd64.changes", "unified_diff": null, "details": [{"source1": "Files", "source2": "Files", "unified_diff": "@@ -3,27 +3,27 @@\n b5eb9ee57c73af3071d10b885df73e34 85448 net optional ibacm_50.0-2_amd64.deb\n fcfa1561add4370ac3d10c774ed7a132 2273928 debug optional ibverbs-providers-dbgsym_50.0-2_amd64.deb\n 0bae733c93839386e5c1ea3089bccd5e 341940 net optional ibverbs-providers_50.0-2_amd64.deb\n c6487105211357bba7b78a9568f76364 201000 debug optional ibverbs-utils-dbgsym_50.0-2_amd64.deb\n 0e91bc740a344a5253331a966f9068ec 56724 net optional ibverbs-utils_50.0-2_amd64.deb\n 111c546512d57e31b736c4926dc981e6 842524 debug optional infiniband-diags-dbgsym_50.0-2_amd64.deb\n e4c4c8a22e74200c49750eab033eea9c 229272 net optional infiniband-diags_50.0-2_amd64.deb\n- e2dbfbea4a1e4f83a822578729151433 53464 libdevel optional libibmad-dev_50.0-2_amd64.deb\n+ 3b96a227953988323967b73b673a273a 53252 libdevel optional libibmad-dev_50.0-2_amd64.deb\n 6f4861fefd4c1f36c977a464a2773134 106588 debug optional libibmad5-dbgsym_50.0-2_amd64.deb\n a99c376403549813dce130eb3897e7ee 43244 libs optional libibmad5_50.0-2_amd64.deb\n- 80b295211c2c1ddb603829e2770b921f 45956 libdevel optional libibnetdisc-dev_50.0-2_amd64.deb\n+ 34da2f76df08ea96cad5684d4f5ad2e9 46020 libdevel optional libibnetdisc-dev_50.0-2_amd64.deb\n 60b5f43e92a2d1eb4205fdada1a56ed6 85912 debug optional libibnetdisc5t64-dbgsym_50.0-2_amd64.deb\n 9f6fc8700e61f2355d2815868fc7bacf 34296 libs optional libibnetdisc5t64_50.0-2_amd64.deb\n- 76b713ccded524abd20cf1b23810e7cc 55784 libdevel optional libibumad-dev_50.0-2_amd64.deb\n+ 8cdf11c96aed251de6cde415c6718240 55856 libdevel optional libibumad-dev_50.0-2_amd64.deb\n 257da4955dc6a44b7996f3dccf2d473c 38424 debug optional libibumad3-dbgsym_50.0-2_amd64.deb\n 0f473d06184e2c8539ee0f1a4e569ea7 27676 libs optional libibumad3_50.0-2_amd64.deb\n- b94f1c1a2d32876d0d5045b45a6f34cf 642352 libdevel optional libibverbs-dev_50.0-2_amd64.deb\n+ 6ebea909664ff40741790f73503c76d1 642624 libdevel optional libibverbs-dev_50.0-2_amd64.deb\n 835b8c3209b041087b1648b03de103db 242724 debug optional libibverbs1-dbgsym_50.0-2_amd64.deb\n 62023aba2807c9515d06ee80b06ab426 61512 libs optional libibverbs1_50.0-2_amd64.deb\n- cb0b726d9be09f0c62ad23e7f2cddb8e 126700 libdevel optional librdmacm-dev_50.0-2_amd64.deb\n+ d578bb3741c23ec9c8140b2688cdaf57 126648 libdevel optional librdmacm-dev_50.0-2_amd64.deb\n b6b7ea9ec9d9fbd46d84756f0eab5e64 230960 debug optional librdmacm1t64-dbgsym_50.0-2_amd64.deb\n 493c08abad607276680e054e693ff471 69980 libs optional librdmacm1t64_50.0-2_amd64.deb\n ca2e8427f038d5c556f219d46332a8e7 6288500 debug optional python3-pyverbs-dbgsym_50.0-2_amd64.deb\n fe3d408bf84fe74aa592705ece4bc839 1525140 python optional python3-pyverbs_50.0-2_amd64.deb\n ac0867536211ebe80c614d4a709c80d9 76228 debug optional rdma-core-dbgsym_50.0-2_amd64.deb\n 1e435410951520bffb05b8111a6d4072 59944 net optional rdma-core_50.0-2_amd64.deb\n 707bb5abd341c013946bf70ee282eb96 249224 debug optional rdmacm-utils-dbgsym_50.0-2_amd64.deb\n"}, {"source1": "libibmad-dev_50.0-2_amd64.deb", "source2": "libibmad-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 920 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 52352 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 52140 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libibmad.a", "source2": "./usr/lib/x86_64-linux-gnu/libibmad.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,26 +1,36 @@\n \n Archive index:\n-pma_query_via in gs.c.o\n-performance_reset_via in gs.c.o\n-mad_trid in mad.c.o\n-mad_get_timeout in mad.c.o\n-mad_get_retries in mad.c.o\n-mad_encode in mad.c.o\n-mad_build_pkt in mad.c.o\n+sa_rpc_call in sa.c.o\n+sa_call in sa.c.o\n+ib_path_query_via in sa.c.o\n+ib_path_query in sa.c.o\n+ib_node_query_via in sa.c.o\n+mad_class_agent in register.c.o\n+rdmacore50_0_mad_register_port_client in register.c.o\n+mad_register_client in register.c.o\n+mad_register_client_via in register.c.o\n+mad_register_server in register.c.o\n+mad_register_server_via in register.c.o\n+smp_mkey_set in smp.c.o\n+smp_mkey_get in smp.c.o\n+smp_set_status_via in smp.c.o\n+smp_set_via in smp.c.o\n+smp_set in smp.c.o\n+smp_query_status_via in smp.c.o\n+smp_query_via in smp.c.o\n+smp_query in smp.c.o\n ib_resolve_smlid_via in resolve.c.o\n ib_resolve_smlid in resolve.c.o\n ib_resolve_gid_via in resolve.c.o\n ib_resolve_guid_via in resolve.c.o\n ib_resolve_self_via in resolve.c.o\n ib_resolve_portid_str_via in resolve.c.o\n ib_resolve_portid_str in resolve.c.o\n ib_resolve_self in resolve.c.o\n-ib_vendor_call in vendor.c.o\n-ib_vendor_call_via in vendor.c.o\n ibdebug in rpc.c.o\n madrpc_show_errors in rpc.c.o\n madrpc_save_mad in rpc.c.o\n madrpc_set_retries in rpc.c.o\n rdmacore50_0_madrpc_retries in rpc.c.o\n madrpc_set_timeout in rpc.c.o\n rdmacore50_0_madrpc_timeout in rpc.c.o\n@@ -33,52 +43,35 @@\n mad_rpc in rpc.c.o\n mad_rpc_rmpp in rpc.c.o\n madrpc in rpc.c.o\n madrpc_rmpp in rpc.c.o\n madrpc_init in rpc.c.o\n mad_rpc_open_port in rpc.c.o\n mad_rpc_close_port in rpc.c.o\n-bm_call_via in bm.c.o\n+mad_trid in mad.c.o\n+mad_get_timeout in mad.c.o\n+mad_get_retries in mad.c.o\n+mad_encode in mad.c.o\n+mad_build_pkt in mad.c.o\n+mad_send_via in serv.c.o\n+mad_send in serv.c.o\n+mad_respond_via in serv.c.o\n+mad_respond in serv.c.o\n+mad_receive in serv.c.o\n+mad_receive_via in serv.c.o\n+mad_alloc in serv.c.o\n+mad_free in serv.c.o\n+cc_query_status_via in cc.c.o\n+cc_config_status_via in cc.c.o\n portid2portnum in portid.c.o\n portid2str in portid.c.o\n str2drpath in portid.c.o\n drpath2str in portid.c.o\n-mad_class_agent in register.c.o\n-rdmacore50_0_mad_register_port_client in register.c.o\n-mad_register_client in register.c.o\n-mad_register_client_via in register.c.o\n-mad_register_server in register.c.o\n-mad_register_server_via in register.c.o\n-smp_mkey_set in smp.c.o\n-smp_mkey_get in smp.c.o\n-smp_set_status_via in smp.c.o\n-smp_set_via in smp.c.o\n-smp_set in smp.c.o\n-smp_query_status_via in smp.c.o\n-smp_query_via in smp.c.o\n-smp_query in smp.c.o\n-sa_rpc_call in sa.c.o\n-sa_call in sa.c.o\n-ib_path_query_via in sa.c.o\n-ib_path_query in sa.c.o\n-ib_node_query_via in sa.c.o\n-mad_get_field in fields.c.o\n-mad_set_field in fields.c.o\n-mad_get_field64 in fields.c.o\n-mad_set_field64 in fields.c.o\n-mad_set_array in fields.c.o\n-mad_get_array in fields.c.o\n-mad_decode_field in fields.c.o\n-mad_encode_field in fields.c.o\n-mad_print_field in fields.c.o\n-mad_dump_field in fields.c.o\n-mad_dump_val in fields.c.o\n-mad_field_name in fields.c.o\n-cc_query_status_via in cc.c.o\n-cc_config_status_via in cc.c.o\n+pma_query_via in gs.c.o\n+performance_reset_via in gs.c.o\n mad_dump_int in dump.c.o\n mad_dump_uint in dump.c.o\n mad_dump_hex in dump.c.o\n mad_dump_rhex in dump.c.o\n mad_dump_linkwidth in dump.c.o\n mad_dump_linkwidthsup in dump.c.o\n mad_dump_linkwidthen in dump.c.o\n@@ -147,71 +140,101 @@\n mad_dump_cc_cacongestionentry in dump.c.o\n mad_dump_cc_congestioncontroltable in dump.c.o\n mad_dump_cc_congestioncontroltableentry in dump.c.o\n mad_dump_cc_timestamp in dump.c.o\n mad_dump_classportinfo in dump.c.o\n mad_dump_portinfo_ext in dump.c.o\n xdump in dump.c.o\n-mad_send_via in serv.c.o\n-mad_send in serv.c.o\n-mad_respond_via in serv.c.o\n-mad_respond in serv.c.o\n-mad_receive in serv.c.o\n-mad_receive_via in serv.c.o\n-mad_alloc in serv.c.o\n-mad_free in serv.c.o\n+ib_vendor_call in vendor.c.o\n+ib_vendor_call_via in vendor.c.o\n+bm_call_via in bm.c.o\n+mad_get_field in fields.c.o\n+mad_set_field in fields.c.o\n+mad_get_field64 in fields.c.o\n+mad_set_field64 in fields.c.o\n+mad_set_array in fields.c.o\n+mad_get_array in fields.c.o\n+mad_decode_field in fields.c.o\n+mad_encode_field in fields.c.o\n+mad_print_field in fields.c.o\n+mad_dump_field in fields.c.o\n+mad_dump_val in fields.c.o\n+mad_field_name in fields.c.o\n \n-gs.c.o:\n+sa.c.o:\n 0000000000000000 r .LC0\n-0000000000000028 r .LC1\n+0000000000000030 r .LC1\n 0000000000000000 r .LC2\n-0000000000000008 r .LC3\n-0000000000000058 r .LC5\n-0000000000000010 r .LC6\n- U __errno_location\n+0000000000000060 r .LC4\n+0000000000000008 r .LC5\n+0000000000000090 r .LC7\n U __fprintf_chk\n 0000000000000000 r __func__.0\n-0000000000000018 r __func__.1\n+0000000000000020 r __func__.1\n+0000000000000038 r __func__.2\n U __stack_chk_fail\n U getpid\n+0000000000000480 T ib_node_query_via\n+0000000000000460 T ib_path_query\n+0000000000000330 T ib_path_query_via\n U ibdebug\n- U mad_rpc\n- U mad_set_field\n-00000000000001a0 T performance_reset_via\n-0000000000000000 T pma_query_via\n+ U mad_decode_field\n+ U mad_encode_field\n+ U mad_rpc_rmpp\n+ U mad_trid\n+ U portid2str\n+ U rdmacore50_0_ibmp\n+0000000000000190 T sa_call\n+0000000000000000 T sa_rpc_call\n U stderr\n \n-mad.c.o:\n+register.c.o:\n 0000000000000000 r .LC0\n-0000000000000038 r .LC1\n- U __errno_location\n+0000000000000030 r .LC1\n+0000000000000068 r .LC2\n+00000000000000a0 r .LC3\n U __fprintf_chk\n 0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n U __stack_chk_fail\n U getpid\n-0000000000000460 T mad_build_pkt\n-0000000000000090 T mad_encode\n-0000000000000070 T mad_get_retries\n-0000000000000050 T mad_get_timeout\n- U mad_set_array\n- U mad_set_field\n- U mad_set_field64\n-0000000000000000 T mad_trid\n- U memcpy\n- U random\n- U rdmacore50_0_madrpc_retries\n- U rdmacore50_0_madrpc_timeout\n- U srandom\n+ U ibdebug\n+0000000000000000 T mad_class_agent\n+0000000000000130 T mad_register_client\n+0000000000000250 T mad_register_client_via\n+0000000000000370 T mad_register_server\n+0000000000000590 T mad_register_server_via\n+ U mad_rpc_portid\n+ U rdmacore50_0_ibmp\n+0000000000000030 T rdmacore50_0_mad_register_port_client\n+ U stderr\n+ U umad_register\n+ U umad_register_oui\n+\n+smp.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U __fprintf_chk\n+0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n+ U __stack_chk_fail\n+ U getpid\n+ U ibdebug\n+ U mad_rpc\n+ U portid2str\n+ U rdmacore50_0_ibmp\n+0000000000000010 T smp_mkey_get\n+0000000000000000 T smp_mkey_set\n+00000000000006f0 T smp_query\n+0000000000000430 T smp_query_status_via\n+00000000000005a0 T smp_query_via\n+00000000000002e0 T smp_set\n+0000000000000020 T smp_set_status_via\n+0000000000000190 T smp_set_via\n U stderr\n- U time\n-0000000000000000 b trid.1\n- U umad_get_mad\n- U umad_set_addr\n- U umad_set_grh\n- U umad_set_pkey\n \n resolve.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n U __fprintf_chk\n 0000000000000020 r __func__.0\n U __stack_chk_fail\n@@ -232,31 +255,14 @@\n U rdmacore50_0_ibmp\n U smp_query_via\n U stderr\n U str2drpath\n U strtol\n U strtoull\n \n-vendor.c.o:\n-0000000000000000 r .LC0\n-0000000000000028 r .LC1\n- U __errno_location\n- U __fprintf_chk\n-0000000000000000 r __func__.0\n- U __stack_chk_fail\n- U getpid\n-0000000000000000 T ib_vendor_call\n-0000000000000270 T ib_vendor_call_via\n- U ibdebug\n- U mad_rpc_rmpp\n- U mad_send_via\n- U portid2str\n- U rdmacore50_0_ibmp\n- U stderr\n-\n rpc.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000140 r .LC10\n 0000000000000180 r .LC11\n 00000000000001c8 r .LC12\n 0000000000000210 r .LC13\n@@ -339,27 +345,97 @@\n U umad_open_port\n U umad_recv\n U umad_send\n U umad_size\n U umad_status\n U xdump\n \n-bm.c.o:\n+mad.c.o:\n+0000000000000000 r .LC0\n+0000000000000038 r .LC1\n+ U __errno_location\n+ U __fprintf_chk\n+0000000000000000 r __func__.0\n+ U __stack_chk_fail\n+ U getpid\n+0000000000000460 T mad_build_pkt\n+0000000000000090 T mad_encode\n+0000000000000070 T mad_get_retries\n+0000000000000050 T mad_get_timeout\n+ U mad_set_array\n+ U mad_set_field\n+ U mad_set_field64\n+0000000000000000 T mad_trid\n+ U memcpy\n+ U random\n+ U rdmacore50_0_madrpc_retries\n+ U rdmacore50_0_madrpc_timeout\n+ U srandom\n+ U stderr\n+ U time\n+0000000000000000 b trid.1\n+ U umad_get_mad\n+ U umad_set_addr\n+ U umad_set_grh\n+ U umad_set_pkey\n+\n+serv.c.o:\n 0000000000000000 r .LC0\n 0000000000000028 r .LC1\n 0000000000000000 r .LC2\n-0000000000000058 r .LC3\n+0000000000000050 r .LC3\n+000000000000000f r .LC4\n+0000000000000078 r .LC5\n+0000000000000029 r .LC6\n+00000000000000d8 r .LC7\n+ U __errno_location\n U __fprintf_chk\n 0000000000000000 r __func__.0\n+0000000000000010 r __func__.1\n+0000000000000020 r __func__.2\n+ U __memset_chk\n U __stack_chk_fail\n-0000000000000000 T bm_call_via\n+ U calloc\n+ U free\n+ U getpid\n+ U ibdebug\n+00000000000008b0 T mad_alloc\n+ U mad_build_pkt\n+00000000000008e0 T mad_free\n+ U mad_get_field\n+ U mad_get_field64\n+ U mad_get_timeout\n+0000000000000650 T mad_receive\n+0000000000000780 T mad_receive_via\n+0000000000000640 T mad_respond\n+0000000000000200 T mad_respond_via\n+00000000000001f0 T mad_send\n+0000000000000000 T mad_send_via\n+ U portid2str\n+ U rdmacore50_0_ibmp\n+ U stderr\n+ U strerror\n+ U umad_get_mad\n+ U umad_get_mad_addr\n+ U umad_recv\n+ U umad_send\n+ U umad_size\n+ U xdump\n+\n+cc.c.o:\n+0000000000000000 r .LC0\n+ U __fprintf_chk\n+0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n+ U __stack_chk_fail\n+0000000000000170 T cc_config_status_via\n+0000000000000000 T cc_query_status_via\n U getpid\n U ibdebug\n U mad_rpc\n- U mad_send_via\n U portid2str\n U stderr\n \n portid.c.o:\n 0000000000000000 r .LC0\n 0000000000000007 r .LC1\n 000000000000000f r .LC2\n@@ -380,148 +456,32 @@\n 0000000000000030 T portid2str\n U stderr\n 0000000000000230 T str2drpath\n U strchr\n U strdup\n U strtol\n \n-register.c.o:\n-0000000000000000 r .LC0\n-0000000000000030 r .LC1\n-0000000000000068 r .LC2\n-00000000000000a0 r .LC3\n- U __fprintf_chk\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n- U __stack_chk_fail\n- U getpid\n- U ibdebug\n-0000000000000000 T mad_class_agent\n-0000000000000130 T mad_register_client\n-0000000000000250 T mad_register_client_via\n-0000000000000370 T mad_register_server\n-0000000000000590 T mad_register_server_via\n- U mad_rpc_portid\n- U rdmacore50_0_ibmp\n-0000000000000030 T rdmacore50_0_mad_register_port_client\n- U stderr\n- U umad_register\n- U umad_register_oui\n-\n-smp.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U __fprintf_chk\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n- U __stack_chk_fail\n- U getpid\n- U ibdebug\n- U mad_rpc\n- U portid2str\n- U rdmacore50_0_ibmp\n-0000000000000010 T smp_mkey_get\n-0000000000000000 T smp_mkey_set\n-00000000000006f0 T smp_query\n-0000000000000430 T smp_query_status_via\n-00000000000005a0 T smp_query_via\n-00000000000002e0 T smp_set\n-0000000000000020 T smp_set_status_via\n-0000000000000190 T smp_set_via\n- U stderr\n-\n-sa.c.o:\n+gs.c.o:\n 0000000000000000 r .LC0\n-0000000000000030 r .LC1\n+0000000000000028 r .LC1\n 0000000000000000 r .LC2\n-0000000000000060 r .LC4\n-0000000000000008 r .LC5\n-0000000000000090 r .LC7\n- U __fprintf_chk\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n-0000000000000038 r __func__.2\n- U __stack_chk_fail\n- U getpid\n-0000000000000480 T ib_node_query_via\n-0000000000000460 T ib_path_query\n-0000000000000330 T ib_path_query_via\n- U ibdebug\n- U mad_decode_field\n- U mad_encode_field\n- U mad_rpc_rmpp\n- U mad_trid\n- U portid2str\n- U rdmacore50_0_ibmp\n-0000000000000190 T sa_call\n-0000000000000000 T sa_rpc_call\n- U stderr\n-\n-fields.c.o:\n-0000000000000000 r .LC0\n-0000000000000006 r .LC1\n- U __memset_chk\n- U __printf_chk\n- U __snprintf_chk\n- U __stack_chk_fail\n-0000000000000000 t _mad_dump\n-0000000000000000 d ib_mad_f\n-00000000000004f0 T mad_decode_field\n- U mad_dump_array\n-0000000000000910 T mad_dump_field\n- U mad_dump_hex\n- U mad_dump_linkdowndefstate\n- U mad_dump_linkspeed\n- U mad_dump_linkspeeden\n- U mad_dump_linkspeedext\n- U mad_dump_linkspeedexten\n- U mad_dump_linkspeedextsup\n- U mad_dump_linkspeedsup\n- U mad_dump_linkwidth\n- U mad_dump_linkwidthen\n- U mad_dump_linkwidthsup\n- U mad_dump_mtu\n- U mad_dump_node_type\n- U mad_dump_opervls\n- U mad_dump_physportstate\n- U mad_dump_portcapmask\n- U mad_dump_portcapmask2\n- U mad_dump_portstate\n- U mad_dump_rhex\n- U mad_dump_string\n- U mad_dump_uint\n-0000000000000a40 T mad_dump_val\n- U mad_dump_vlcap\n-00000000000006b0 T mad_encode_field\n-0000000000000ab0 T mad_field_name\n-0000000000000480 T mad_get_array\n-0000000000000120 T mad_get_field\n-0000000000000390 T mad_get_field64\n-00000000000008b0 T mad_print_field\n-0000000000000410 T mad_set_array\n-0000000000000230 T mad_set_field\n-00000000000003d0 T mad_set_field64\n- U memcpy\n- U rdmacore50_0_mad_dump_linkspeedext2\n- U rdmacore50_0_mad_dump_linkspeedexten2\n- U rdmacore50_0_mad_dump_linkspeedextsup2\n- U strlen\n-\n-cc.c.o:\n-0000000000000000 r .LC0\n+0000000000000008 r .LC3\n+0000000000000058 r .LC5\n+0000000000000010 r .LC6\n+ U __errno_location\n U __fprintf_chk\n 0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n+0000000000000018 r __func__.1\n U __stack_chk_fail\n-0000000000000170 T cc_config_status_via\n-0000000000000000 T cc_query_status_via\n U getpid\n U ibdebug\n U mad_rpc\n- U portid2str\n+ U mad_set_field\n+00000000000001a0 T performance_reset_via\n+0000000000000000 T pma_query_via\n U stderr\n \n dump.c.o:\n 0000000000000000 r .LC0\n 0000000000000003 r .LC1\n 000000000000002f r .LC10\n 0000000000000160 r .LC100\n@@ -780,49 +740,89 @@\n 00000000000010d0 T rdmacore50_0_mad_dump_linkspeedextsup2\n U snprintf\n U stderr\n U strlen\n U strncpy\n 0000000000004fd0 T xdump\n \n-serv.c.o:\n+vendor.c.o:\n 0000000000000000 r .LC0\n 0000000000000028 r .LC1\n-0000000000000000 r .LC2\n-0000000000000050 r .LC3\n-000000000000000f r .LC4\n-0000000000000078 r .LC5\n-0000000000000029 r .LC6\n-00000000000000d8 r .LC7\n U __errno_location\n U __fprintf_chk\n 0000000000000000 r __func__.0\n-0000000000000010 r __func__.1\n-0000000000000020 r __func__.2\n- U __memset_chk\n U __stack_chk_fail\n- U calloc\n- U free\n U getpid\n+0000000000000000 T ib_vendor_call\n+0000000000000270 T ib_vendor_call_via\n U ibdebug\n-00000000000008b0 T mad_alloc\n- U mad_build_pkt\n-00000000000008e0 T mad_free\n- U mad_get_field\n- U mad_get_field64\n- U mad_get_timeout\n-0000000000000650 T mad_receive\n-0000000000000780 T mad_receive_via\n-0000000000000640 T mad_respond\n-0000000000000200 T mad_respond_via\n-00000000000001f0 T mad_send\n-0000000000000000 T mad_send_via\n+ U mad_rpc_rmpp\n+ U mad_send_via\n U portid2str\n U rdmacore50_0_ibmp\n U stderr\n- U strerror\n- U umad_get_mad\n- U umad_get_mad_addr\n- U umad_recv\n- U umad_send\n- U umad_size\n- U xdump\n+\n+bm.c.o:\n+0000000000000000 r .LC0\n+0000000000000028 r .LC1\n+0000000000000000 r .LC2\n+0000000000000058 r .LC3\n+ U __fprintf_chk\n+0000000000000000 r __func__.0\n+ U __stack_chk_fail\n+0000000000000000 T bm_call_via\n+ U getpid\n+ U ibdebug\n+ U mad_rpc\n+ U mad_send_via\n+ U portid2str\n+ U stderr\n+\n+fields.c.o:\n+0000000000000000 r .LC0\n+0000000000000006 r .LC1\n+ U __memset_chk\n+ U __printf_chk\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+0000000000000000 t _mad_dump\n+0000000000000000 d ib_mad_f\n+00000000000004f0 T mad_decode_field\n+ U mad_dump_array\n+0000000000000910 T mad_dump_field\n+ U mad_dump_hex\n+ U mad_dump_linkdowndefstate\n+ U mad_dump_linkspeed\n+ U mad_dump_linkspeeden\n+ U mad_dump_linkspeedext\n+ U mad_dump_linkspeedexten\n+ U mad_dump_linkspeedextsup\n+ U mad_dump_linkspeedsup\n+ U mad_dump_linkwidth\n+ U mad_dump_linkwidthen\n+ U mad_dump_linkwidthsup\n+ U mad_dump_mtu\n+ U mad_dump_node_type\n+ U mad_dump_opervls\n+ U mad_dump_physportstate\n+ U mad_dump_portcapmask\n+ U mad_dump_portcapmask2\n+ U mad_dump_portstate\n+ U mad_dump_rhex\n+ U mad_dump_string\n+ U mad_dump_uint\n+0000000000000a40 T mad_dump_val\n+ U mad_dump_vlcap\n+00000000000006b0 T mad_encode_field\n+0000000000000ab0 T mad_field_name\n+0000000000000480 T mad_get_array\n+0000000000000120 T mad_get_field\n+0000000000000390 T mad_get_field64\n+00000000000008b0 T mad_print_field\n+0000000000000410 T mad_set_array\n+0000000000000230 T mad_set_field\n+00000000000003d0 T mad_set_field64\n+ U memcpy\n+ U rdmacore50_0_mad_dump_linkspeedext2\n+ U rdmacore50_0_mad_dump_linkspeedexten2\n+ U rdmacore50_0_mad_dump_linkspeedextsup2\n+ U strlen\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,15 +1,15 @@\n ---------- 0 0 0 4042 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 4232 1970-01-01 00:00:00.000000 gs.c.o\n-?rw-r--r-- 0 0 0 6128 1970-01-01 00:00:00.000000 mad.c.o\n-?rw-r--r-- 0 0 0 6936 1970-01-01 00:00:00.000000 resolve.c.o\n-?rw-r--r-- 0 0 0 4296 1970-01-01 00:00:00.000000 vendor.c.o\n-?rw-r--r-- 0 0 0 16904 1970-01-01 00:00:00.000000 rpc.c.o\n-?rw-r--r-- 0 0 0 3624 1970-01-01 00:00:00.000000 bm.c.o\n-?rw-r--r-- 0 0 0 5232 1970-01-01 00:00:00.000000 portid.c.o\n+?rw-r--r-- 0 0 0 6264 1970-01-01 00:00:00.000000 sa.c.o\n ?rw-r--r-- 0 0 0 6848 1970-01-01 00:00:00.000000 register.c.o\n ?rw-r--r-- 0 0 0 6504 1970-01-01 00:00:00.000000 smp.c.o\n-?rw-r--r-- 0 0 0 6264 1970-01-01 00:00:00.000000 sa.c.o\n-?rw-r--r-- 0 0 0 54728 1970-01-01 00:00:00.000000 fields.c.o\n+?rw-r--r-- 0 0 0 6936 1970-01-01 00:00:00.000000 resolve.c.o\n+?rw-r--r-- 0 0 0 16904 1970-01-01 00:00:00.000000 rpc.c.o\n+?rw-r--r-- 0 0 0 6128 1970-01-01 00:00:00.000000 mad.c.o\n+?rw-r--r-- 0 0 0 8552 1970-01-01 00:00:00.000000 serv.c.o\n ?rw-r--r-- 0 0 0 3168 1970-01-01 00:00:00.000000 cc.c.o\n+?rw-r--r-- 0 0 0 5232 1970-01-01 00:00:00.000000 portid.c.o\n+?rw-r--r-- 0 0 0 4232 1970-01-01 00:00:00.000000 gs.c.o\n ?rw-r--r-- 0 0 0 59120 1970-01-01 00:00:00.000000 dump.c.o\n-?rw-r--r-- 0 0 0 8552 1970-01-01 00:00:00.000000 serv.c.o\n+?rw-r--r-- 0 0 0 4296 1970-01-01 00:00:00.000000 vendor.c.o\n+?rw-r--r-- 0 0 0 3624 1970-01-01 00:00:00.000000 bm.c.o\n+?rw-r--r-- 0 0 0 54728 1970-01-01 00:00:00.000000 fields.c.o\n"}]}]}, {"source1": "xz --list", "source2": "xz --list", "unified_diff": "@@ -1,13 +1,13 @@\n Streams: 1\n Blocks: 1\n- Compressed size: 51.1 KiB (52352 B)\n+ Compressed size: 50.9 KiB (52140 B)\n Uncompressed size: 290.0 KiB (296960 B)\n Ratio: 0.176\n Check: CRC64\n Stream Padding: 0 B\n Streams:\n Stream Blocks CompOffset UncompOffset CompSize UncompSize Ratio Check Padding\n- 1 1 0 0 52352 296960 0.176 CRC64 0\n+ 1 1 0 0 52140 296960 0.176 CRC64 0\n Blocks:\n Stream Block CompOffset UncompOffset TotalSize UncompSize Ratio Check\n- 1 1 12 0 52316 296960 0.176 CRC64\n+ 1 1 12 0 52104 296960 0.175 CRC64\n"}]}]}, {"source1": "libibnetdisc-dev_50.0-2_amd64.deb", "source2": "libibnetdisc-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 1072 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 44692 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 44756 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libibnetdisc.a", "source2": "./usr/lib/x86_64-linux-gnu/libibnetdisc.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "comments": ["error from `nm -s {}`:", "nm: mmio.c.o: no symbols"], "unified_diff": "@@ -1,15 +1,15 @@\n \n Archive index:\n+ibnd_load_fabric in ibnetdisc_cache.c.o\n+ibnd_cache_fabric in ibnetdisc_cache.c.o\n rdmacore50_0_issue_smp in query_smp.c.o\n rdmacore50_0_smp_engine_init in query_smp.c.o\n rdmacore50_0_smp_engine_destroy in query_smp.c.o\n rdmacore50_0_process_mads in query_smp.c.o\n-ibnd_load_fabric in ibnetdisc_cache.c.o\n-ibnd_cache_fabric in ibnetdisc_cache.c.o\n ibnd_get_chassis_type in chassis.c.o\n ibnd_get_chassis_slot_str in chassis.c.o\n ibnd_is_xsigo_guid in chassis.c.o\n ibnd_is_xsigo_hca in chassis.c.o\n ibnd_is_xsigo_tca in chassis.c.o\n ibnd_get_chassis_guid in chassis.c.o\n rdmacore50_0_group_nodes in chassis.c.o\n@@ -36,95 +36,45 @@\n ibnd_get_agg_linkspeedexten in ibnetdisc.c.o\n ibnd_get_agg_linkspeedextsup in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedext in ibnetdisc.c.o\n rdmacore50_0_mlnx_ext_port_info_err in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedext_bits in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedexten in ibnetdisc.c.o\n ibnd_dump_agg_linkspeedextsup in ibnetdisc.c.o\n-rdmacore50_0_open_cdev in open_cdev.c.o\n+rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n+rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n rdmacore50_0_bitmap_find_first_bit in bitmap.c.o\n rdmacore50_0_bitmap_zero_region in bitmap.c.o\n rdmacore50_0_bitmap_fill_region in bitmap.c.o\n rdmacore50_0_bitmap_find_free_region in bitmap.c.o\n+rdmacore50_0_set_fd_nonblock in util.c.o\n+rdmacore50_0_get_random in util.c.o\n+rdmacore50_0_check_env in util.c.o\n+rdmacore50_0_xorshift32 in util.c.o\n rdmacore50_0_cl_qmap_init in cl_map.c.o\n rdmacore50_0_cl_qmap_get in cl_map.c.o\n rdmacore50_0_cl_qmap_get_next in cl_map.c.o\n rdmacore50_0_cl_qmap_apply_func in cl_map.c.o\n rdmacore50_0_cl_qmap_insert in cl_map.c.o\n rdmacore50_0_cl_qmap_remove_item in cl_map.c.o\n rdmacore50_0_cl_qmap_remove in cl_map.c.o\n rdmacore50_0_cl_qmap_merge in cl_map.c.o\n rdmacore50_0_cl_qmap_delta in cl_map.c.o\n-rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n-rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n rdmacore50_0_close_node_name_map in node_name_map.c.o\n rdmacore50_0_remap_node_name in node_name_map.c.o\n rdmacore50_0_clean_nodedesc in node_name_map.c.o\n rdmacore50_0_open_node_name_map in node_name_map.c.o\n+rdmacore50_0_open_cdev in open_cdev.c.o\n rdmacore50_0_iset_create in interval_set.c.o\n rdmacore50_0_iset_destroy in interval_set.c.o\n rdmacore50_0_iset_insert_range in interval_set.c.o\n rdmacore50_0_iset_alloc_range in interval_set.c.o\n-rdmacore50_0_set_fd_nonblock in util.c.o\n-rdmacore50_0_get_random in util.c.o\n-rdmacore50_0_check_env in util.c.o\n-rdmacore50_0_xorshift32 in util.c.o\n-\n-query_smp.c.o:\n-0000000000000000 r .LC0\n-000000000000001b r .LC1\n-000000000000007a r .LC10\n-00000000000000c8 r .LC11\n-00000000000000f0 r .LC12\n-0000000000000120 r .LC13\n-0000000000000093 r .LC14\n-0000000000000158 r .LC15\n-0000000000000000 r .LC2\n-0000000000000039 r .LC3\n-0000000000000051 r .LC4\n-0000000000000028 r .LC5\n-0000000000000060 r .LC6\n-0000000000000098 r .LC7\n-000000000000006e r .LC8\n-0000000000000000 r .LC9\n- U __fprintf_chk\n- U __memset_chk\n- U __stack_chk_fail\n- U calloc\n- U free\n- U mad_build_pkt\n- U mad_get_field\n- U mad_get_field64\n- U mad_trid\n- U portid2str\n-0000000000000180 t process_one_recv\n- U rdmacore50_0_cl_qmap_init\n- U rdmacore50_0_cl_qmap_insert\n- U rdmacore50_0_cl_qmap_remove\n- U rdmacore50_0_cl_qmap_remove_item\n-0000000000000460 T rdmacore50_0_issue_smp\n- U rdmacore50_0_mlnx_ext_port_info_err\n-0000000000000930 T rdmacore50_0_process_mads\n-0000000000000820 T rdmacore50_0_smp_engine_destroy\n-0000000000000690 T rdmacore50_0_smp_engine_init\n-0000000000000000 t send_smp\n- U stderr\n- U strerror\n- U umad_close_port\n- U umad_get_mad\n- U umad_init\n- U umad_open_port\n- U umad_recv\n- U umad_register\n- U umad_send\n- U umad_size\n- U umad_status\n \n ibnetdisc_cache.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000078 r .LC10\n 0000000000000078 r .LC11\n 0000000000000090 r .LC12\n@@ -183,14 +133,64 @@\n U rdmacore50_0_group_nodes\n U read\n U stat\n U strerror\n U unlink\n U write\n \n+query_smp.c.o:\n+0000000000000000 r .LC0\n+000000000000001b r .LC1\n+000000000000007a r .LC10\n+00000000000000c8 r .LC11\n+00000000000000f0 r .LC12\n+0000000000000120 r .LC13\n+0000000000000093 r .LC14\n+0000000000000158 r .LC15\n+0000000000000000 r .LC2\n+0000000000000039 r .LC3\n+0000000000000051 r .LC4\n+0000000000000028 r .LC5\n+0000000000000060 r .LC6\n+0000000000000098 r .LC7\n+000000000000006e r .LC8\n+0000000000000000 r .LC9\n+ U __fprintf_chk\n+ U __memset_chk\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+ U mad_build_pkt\n+ U mad_get_field\n+ U mad_get_field64\n+ U mad_trid\n+ U portid2str\n+0000000000000180 t process_one_recv\n+ U rdmacore50_0_cl_qmap_init\n+ U rdmacore50_0_cl_qmap_insert\n+ U rdmacore50_0_cl_qmap_remove\n+ U rdmacore50_0_cl_qmap_remove_item\n+0000000000000460 T rdmacore50_0_issue_smp\n+ U rdmacore50_0_mlnx_ext_port_info_err\n+0000000000000930 T rdmacore50_0_process_mads\n+0000000000000820 T rdmacore50_0_smp_engine_destroy\n+0000000000000690 T rdmacore50_0_smp_engine_init\n+0000000000000000 t send_smp\n+ U stderr\n+ U strerror\n+ U umad_close_port\n+ U umad_get_mad\n+ U umad_init\n+ U umad_open_port\n+ U umad_recv\n+ U umad_register\n+ U umad_send\n+ U umad_size\n+ U umad_status\n+\n chassis.c.o:\n 0000000000000000 r .LC0\n 0000000000000019 r .LC1\n 00000000000000b8 r .LC10\n 0000000000000128 r .LC11\n 0000000000000198 r .LC12\n 0000000000000208 r .LC13\n@@ -371,50 +371,15 @@\n 0000000000002040 t recv_port_info\n 0000000000000050 t recv_switch_info\n U smp_mkey_set\n U snprintf\n U stderr\n U str2drpath\n \n-open_cdev.c.o:\n-0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-000000000000001b r .LC2\n- U __asprintf_chk\n- U __stack_chk_fail\n- U close\n- U free\n- U fstat\n- U inotify_add_watch\n- U inotify_init1\n- U open\n-0000000000000000 t open_cdev_robust.isra.0\n- U poll\n-0000000000000380 T rdmacore50_0_open_cdev\n- U read\n- U timerfd_create\n- U timerfd_settime\n-\n-bitmap.c.o:\n- U memset\n-0000000000000160 T rdmacore50_0_bitmap_fill_region\n-0000000000000000 T rdmacore50_0_bitmap_find_first_bit\n-0000000000000220 T rdmacore50_0_bitmap_find_free_region\n-0000000000000090 T rdmacore50_0_bitmap_zero_region\n-\n-cl_map.c.o:\n-00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n-0000000000000db0 T rdmacore50_0_cl_qmap_delta\n-0000000000000060 T rdmacore50_0_cl_qmap_get\n-00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n-0000000000000000 T rdmacore50_0_cl_qmap_init\n-0000000000000140 T rdmacore50_0_cl_qmap_insert\n-00000000000008f0 T rdmacore50_0_cl_qmap_merge\n-00000000000008b0 T rdmacore50_0_cl_qmap_remove\n-0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n+mmio.c.o:\n \n rdma_nl.c.o:\n U __stack_chk_fail\n U nl_connect\n U nl_recvmsgs_default\n U nl_send_auto\n U nl_send_simple\n@@ -431,14 +396,44 @@\n 0000000000000060 T rdmacore50_0_rdmanl_get_copy_on_fork\n 0000000000000130 T rdmacore50_0_rdmanl_get_devices\n 0000000000000000 D rdmacore50_0_rdmanl_policy\n 0000000000000010 T rdmacore50_0_rdmanl_socket_alloc\n 0000000000000000 t rdmanl_saw_err_cb\n U strlen\n \n+bitmap.c.o:\n+ U memset\n+0000000000000160 T rdmacore50_0_bitmap_fill_region\n+0000000000000000 T rdmacore50_0_bitmap_find_first_bit\n+0000000000000220 T rdmacore50_0_bitmap_find_free_region\n+0000000000000090 T rdmacore50_0_bitmap_zero_region\n+\n+util.c.o:\n+ U fcntl\n+ U getenv\n+ U getrandom\n+ U rand_r\n+00000000000000d0 T rdmacore50_0_check_env\n+0000000000000050 T rdmacore50_0_get_random\n+0000000000000000 T rdmacore50_0_set_fd_nonblock\n+0000000000000110 T rdmacore50_0_xorshift32\n+0000000000000000 b seed.0\n+ U time\n+\n+cl_map.c.o:\n+00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n+0000000000000db0 T rdmacore50_0_cl_qmap_delta\n+0000000000000060 T rdmacore50_0_cl_qmap_get\n+00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n+0000000000000000 T rdmacore50_0_cl_qmap_init\n+0000000000000140 T rdmacore50_0_cl_qmap_insert\n+00000000000008f0 T rdmacore50_0_cl_qmap_merge\n+00000000000008b0 T rdmacore50_0_cl_qmap_remove\n+0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n+\n node_name_map.c.o:\n 0000000000000000 r .LC0\n 000000000000001b r .LC1\n 000000000000001d r .LC2\n 0000000000000000 r .LC3\n 0000000000000020 r .LC4\n 0000000000000030 r .LC5\n@@ -464,32 +459,37 @@\n U strchr\n U strdup\n U strerror\n U strncpy\n U strtok\n U strtoull\n \n-mmio.c.o:\n+open_cdev.c.o:\n+0000000000000000 r .LC0\n+0000000000000010 r .LC1\n+000000000000001b r .LC2\n+ U __asprintf_chk\n+ U __stack_chk_fail\n+ U close\n+ U free\n+ U fstat\n+ U inotify_add_watch\n+ U inotify_init1\n+ U open\n+0000000000000000 t open_cdev_robust.isra.0\n+ U poll\n+0000000000000380 T rdmacore50_0_open_cdev\n+ U read\n+ U timerfd_create\n+ U timerfd_settime\n \n interval_set.c.o:\n U __errno_location\n U calloc\n U free\n U pthread_mutex_init\n U pthread_mutex_lock\n U pthread_mutex_unlock\n 0000000000000290 T rdmacore50_0_iset_alloc_range\n 0000000000000000 T rdmacore50_0_iset_create\n 0000000000000050 T rdmacore50_0_iset_destroy\n 0000000000000090 T rdmacore50_0_iset_insert_range\n-\n-util.c.o:\n- U fcntl\n- U getenv\n- U getrandom\n- U rand_r\n-00000000000000d0 T rdmacore50_0_check_env\n-0000000000000050 T rdmacore50_0_get_random\n-0000000000000000 T rdmacore50_0_set_fd_nonblock\n-0000000000000110 T rdmacore50_0_xorshift32\n-0000000000000000 b seed.0\n- U time\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,14 +1,14 @@\n ---------- 0 0 0 2206 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n-?rw-r--r-- 0 0 0 8680 1970-01-01 00:00:00.000000 query_smp.c.o\n ?rw-r--r-- 0 0 0 16424 1970-01-01 00:00:00.000000 ibnetdisc_cache.c.o\n+?rw-r--r-- 0 0 0 8680 1970-01-01 00:00:00.000000 query_smp.c.o\n ?rw-r--r-- 0 0 0 22736 1970-01-01 00:00:00.000000 chassis.c.o\n ?rw-r--r-- 0 0 0 32880 1970-01-01 00:00:00.000000 ibnetdisc.c.o\n-?rw-r--r-- 0 0 0 3952 1970-01-01 00:00:00.000000 open_cdev.c.o\n+?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 mmio.c.o\n+?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n ?rw-r--r-- 0 0 0 2496 1970-01-01 00:00:00.000000 bitmap.c.o\n+?rw-r--r-- 0 0 0 2264 1970-01-01 00:00:00.000000 util.c.o\n ?rw-r--r-- 0 0 0 6176 1970-01-01 00:00:00.000000 cl_map.c.o\n-?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n ?rw-r--r-- 0 0 0 5456 1970-01-01 00:00:00.000000 node_name_map.c.o\n-?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 mmio.c.o\n+?rw-r--r-- 0 0 0 3952 1970-01-01 00:00:00.000000 open_cdev.c.o\n ?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 interval_set.c.o\n-?rw-r--r-- 0 0 0 2264 1970-01-01 00:00:00.000000 util.c.o\n"}]}]}, {"source1": "xz --list", "source2": "xz --list", "unified_diff": "@@ -1,13 +1,13 @@\n Streams: 1\n Blocks: 1\n- Compressed size: 43.6 KiB (44692 B)\n+ Compressed size: 43.7 KiB (44756 B)\n Uncompressed size: 170.0 KiB (174080 B)\n Ratio: 0.257\n Check: CRC64\n Stream Padding: 0 B\n Streams:\n Stream Blocks CompOffset UncompOffset CompSize UncompSize Ratio Check Padding\n- 1 1 0 0 44692 174080 0.257 CRC64 0\n+ 1 1 0 0 44756 174080 0.257 CRC64 0\n Blocks:\n Stream Block CompOffset UncompOffset TotalSize UncompSize Ratio Check\n- 1 1 12 0 44656 174080 0.257 CRC64\n+ 1 1 12 0 44720 174080 0.257 CRC64\n"}]}]}, {"source1": "libibumad-dev_50.0-2_amd64.deb", "source2": "libibumad-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 1852 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 53740 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 53812 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libibumad.a", "source2": "./usr/lib/x86_64-linux-gnu/libibumad.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,14 +1,9 @@\n \n Archive index:\n-rdmacore50_0_sys_read_string in sysfs.c.o\n-rdmacore50_0_sys_read_guid in sysfs.c.o\n-rdmacore50_0_sys_read_gid in sysfs.c.o\n-rdmacore50_0_sys_read_uint64 in sysfs.c.o\n-rdmacore50_0_sys_read_uint in sysfs.c.o\n umad_init in umad.c.o\n umad_done in umad.c.o\n umad_get_cas_names in umad.c.o\n umad_release_ca in umad.c.o\n umad_release_port in umad.c.o\n umad_close_port in umad.c.o\n umad_get_mad in umad.c.o\n@@ -35,39 +30,25 @@\n umad_get_ca_device_list in umad.c.o\n umad_get_issm_path in umad.c.o\n umad_open_port in umad.c.o\n umad_get_ca in umad.c.o\n umad_get_ca_portguids in umad.c.o\n umad_get_port in umad.c.o\n umad_free_ca_device_list in umad.c.o\n+rdmacore50_0_sys_read_string in sysfs.c.o\n+rdmacore50_0_sys_read_guid in sysfs.c.o\n+rdmacore50_0_sys_read_gid in sysfs.c.o\n+rdmacore50_0_sys_read_uint64 in sysfs.c.o\n+rdmacore50_0_sys_read_uint in sysfs.c.o\n umad_class_str in umad_str.c.o\n umad_method_str in umad_str.c.o\n umad_common_mad_status_str in umad_str.c.o\n umad_sa_mad_status_str in umad_str.c.o\n umad_attribute_str in umad_str.c.o\n \n-sysfs.c.o:\n-0000000000000000 r .LC0\n-0000000000000006 r .LC1\n- U __errno_location\n- U __snprintf_chk\n- U __stack_chk_fail\n- U close\n- U open\n-00000000000001d0 T rdmacore50_0_sys_read_gid\n-0000000000000110 T rdmacore50_0_sys_read_guid\n-0000000000000000 T rdmacore50_0_sys_read_string\n-00000000000003a0 T rdmacore50_0_sys_read_uint\n-0000000000000280 T rdmacore50_0_sys_read_uint64\n- U read\n- U strrchr\n- U strsep\n- U strtoul\n- U strtoull\n-\n umad.c.o:\n 0000000000000000 r .LC0\n 0000000000000016 r .LC1\n 000000000000004d r .LC10\n 0000000000000053 r .LC11\n 0000000000000057 r .LC12\n 000000000000005d r .LC13\n@@ -263,14 +244,33 @@\n 0000000000000fe0 T umad_size\n 0000000000002430 T umad_sort_ca_device_list\n 0000000000002060 T umad_status\n 0000000000001ff0 T umad_unregister\n 0000000000000008 b umaddebug\n U write\n \n+sysfs.c.o:\n+0000000000000000 r .LC0\n+0000000000000006 r .LC1\n+ U __errno_location\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U close\n+ U open\n+00000000000001d0 T rdmacore50_0_sys_read_gid\n+0000000000000110 T rdmacore50_0_sys_read_guid\n+0000000000000000 T rdmacore50_0_sys_read_string\n+00000000000003a0 T rdmacore50_0_sys_read_uint\n+0000000000000280 T rdmacore50_0_sys_read_uint64\n+ U read\n+ U strrchr\n+ U strsep\n+ U strtoul\n+ U strtoull\n+\n umad_str.c.o:\n 0000000000000000 r .LC0\n 0000000000000005 r .LC1\n 000000000000003d r .LC10\n 0000000000000512 r .LC100\n 000000000000051c r .LC101\n 000000000000052a r .LC102\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 930 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 4480 1970-01-01 00:00:00.000000 sysfs.c.o\n ?rw-r--r-- 0 0 0 45672 1970-01-01 00:00:00.000000 umad.c.o\n+?rw-r--r-- 0 0 0 4480 1970-01-01 00:00:00.000000 sysfs.c.o\n ?rw-r--r-- 0 0 0 15400 1970-01-01 00:00:00.000000 umad_str.c.o\n"}]}]}, {"source1": "xz --list", "source2": "xz --list", "unified_diff": "@@ -1,13 +1,13 @@\n Streams: 1\n Blocks: 1\n- Compressed size: 52.5 KiB (53740 B)\n+ Compressed size: 52.6 KiB (53812 B)\n Uncompressed size: 200.0 KiB (204800 B)\n- Ratio: 0.262\n+ Ratio: 0.263\n Check: CRC64\n Stream Padding: 0 B\n Streams:\n Stream Blocks CompOffset UncompOffset CompSize UncompSize Ratio Check Padding\n- 1 1 0 0 53740 204800 0.262 CRC64 0\n+ 1 1 0 0 53812 204800 0.263 CRC64 0\n Blocks:\n Stream Block CompOffset UncompOffset TotalSize UncompSize Ratio Check\n- 1 1 12 0 53704 204800 0.262 CRC64\n+ 1 1 12 0 53776 204800 0.263 CRC64\n"}]}]}, {"source1": "libibverbs-dev_50.0-2_amd64.deb", "source2": "libibverbs-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n--rw-r--r-- 0 0 0 5540 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 636620 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 5544 2024-02-29 02:11:46.000000 control.tar.xz\n+-rw-r--r-- 0 0 0 636888 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}, {"source1": "xz --list", "source2": "xz --list", "unified_diff": "@@ -1,13 +1,13 @@\n Streams: 1\n Blocks: 1\n- Compressed size: 5540 B\n+ Compressed size: 5544 B\n Uncompressed size: 20.0 KiB (20480 B)\n Ratio: 0.271\n Check: CRC64\n Stream Padding: 0 B\n Streams:\n Stream Blocks CompOffset UncompOffset CompSize UncompSize Ratio Check Padding\n- 1 1 0 0 5540 20480 0.271 CRC64 0\n+ 1 1 0 0 5544 20480 0.271 CRC64 0\n Blocks:\n Stream Block CompOffset UncompOffset TotalSize UncompSize Ratio Check\n- 1 1 12 0 5504 20480 0.269 CRC64\n+ 1 1 12 0 5508 20480 0.269 CRC64\n"}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/libbnxt_re-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libbnxt_re-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,25 +1,9 @@\n \n Archive index:\n-rdmacore50_0_bnxt_re_ring_rq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_sq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_srq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_srq_arm in db.c.o\n-rdmacore50_0_bnxt_re_ring_cq_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_cq_arm_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_pstart_db in db.c.o\n-rdmacore50_0_bnxt_re_ring_pend_db in db.c.o\n-rdmacore50_0_bnxt_re_fill_push_wcb in db.c.o\n-rdmacore50_0_bnxt_re_init_pbuf_list in db.c.o\n-rdmacore50_0_bnxt_re_get_pbuf in db.c.o\n-rdmacore50_0_bnxt_re_put_pbuf in db.c.o\n-rdmacore50_0_bnxt_re_destroy_pbuf_list in db.c.o\n-rdmacore50_0_bnxt_re_alloc_aligned in memory.c.o\n-rdmacore50_0_bnxt_re_free_aligned in memory.c.o\n-verbs_provider_bnxt_re in main.c.o\n rdmacore50_0_bnxt_re_query_device in verbs.c.o\n rdmacore50_0_bnxt_re_query_port in verbs.c.o\n rdmacore50_0_bnxt_re_get_toggle_mem in verbs.c.o\n rdmacore50_0_bnxt_re_notify_drv in verbs.c.o\n rdmacore50_0_bnxt_re_alloc_page in verbs.c.o\n rdmacore50_0_bnxt_re_alloc_pd in verbs.c.o\n rdmacore50_0_bnxt_re_free_pd in verbs.c.o\n@@ -41,96 +25,30 @@\n rdmacore50_0_bnxt_re_create_srq in verbs.c.o\n rdmacore50_0_bnxt_re_modify_srq in verbs.c.o\n rdmacore50_0_bnxt_re_destroy_srq in verbs.c.o\n rdmacore50_0_bnxt_re_query_srq in verbs.c.o\n rdmacore50_0_bnxt_re_post_srq_recv in verbs.c.o\n rdmacore50_0_bnxt_re_create_ah in verbs.c.o\n rdmacore50_0_bnxt_re_destroy_ah in verbs.c.o\n-\n-db.c.o:\n- U __stack_chk_fail\n-0000000000000000 t bnxt_re_do_pacing\n- U calloc\n- U clock_gettime\n- U free\n-00000000000009c0 T rdmacore50_0_bnxt_re_destroy_pbuf_list\n-0000000000000500 T rdmacore50_0_bnxt_re_fill_push_wcb\n-0000000000000920 T rdmacore50_0_bnxt_re_get_pbuf\n-0000000000000600 T rdmacore50_0_bnxt_re_init_pbuf_list\n- U rdmacore50_0_bnxt_re_notify_drv\n-0000000000000980 T rdmacore50_0_bnxt_re_put_pbuf\n-00000000000003b0 T rdmacore50_0_bnxt_re_ring_cq_arm_db\n-0000000000000350 T rdmacore50_0_bnxt_re_ring_cq_db\n-00000000000004a0 T rdmacore50_0_bnxt_re_ring_pend_db\n-0000000000000440 T rdmacore50_0_bnxt_re_ring_pstart_db\n-00000000000001b0 T rdmacore50_0_bnxt_re_ring_rq_db\n-0000000000000220 T rdmacore50_0_bnxt_re_ring_sq_db\n-00000000000002f0 T rdmacore50_0_bnxt_re_ring_srq_arm\n-0000000000000290 T rdmacore50_0_bnxt_re_ring_srq_db\n- U rdmacore50_0_xorshift32\n-\n-memory.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U memset\n- U mmap\n- U munmap\n-0000000000000000 T rdmacore50_0_bnxt_re_alloc_aligned\n-00000000000000b0 T rdmacore50_0_bnxt_re_free_aligned\n-\n-main.c.o:\n- U __stack_chk_fail\n-0000000000000120 t bnxt_re_alloc_context\n-0000000000000000 d bnxt_re_cntx_ops\n-0000000000000000 d bnxt_re_dev_ops\n-0000000000000000 t bnxt_re_device_alloc\n-0000000000000020 t bnxt_re_free_context\n- U calloc\n-0000000000000000 r cna_table\n-0000000000000000 t drv__register_driver\n- U free\n- U ibv_query_device\n- U mmap\n- U munmap\n- U pthread_mutex_destroy\n- U pthread_mutex_init\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_bnxt_re_alloc_page\n- U rdmacore50_0_bnxt_re_alloc_pd\n- U rdmacore50_0_bnxt_re_arm_cq\n- U rdmacore50_0_bnxt_re_async_event\n- U rdmacore50_0_bnxt_re_create_ah\n- U rdmacore50_0_bnxt_re_create_cq\n- U rdmacore50_0_bnxt_re_create_qp\n- U rdmacore50_0_bnxt_re_create_srq\n- U rdmacore50_0_bnxt_re_dereg_mr\n- U rdmacore50_0_bnxt_re_destroy_ah\n- U rdmacore50_0_bnxt_re_destroy_cq\n- U rdmacore50_0_bnxt_re_destroy_qp\n- U rdmacore50_0_bnxt_re_destroy_srq\n- U rdmacore50_0_bnxt_re_free_pd\n- U rdmacore50_0_bnxt_re_modify_qp\n- U rdmacore50_0_bnxt_re_modify_srq\n- U rdmacore50_0_bnxt_re_poll_cq\n- U rdmacore50_0_bnxt_re_post_recv\n- U rdmacore50_0_bnxt_re_post_send\n- U rdmacore50_0_bnxt_re_post_srq_recv\n- U rdmacore50_0_bnxt_re_query_device\n- U rdmacore50_0_bnxt_re_query_port\n- U rdmacore50_0_bnxt_re_query_qp\n- U rdmacore50_0_bnxt_re_query_srq\n- U rdmacore50_0_bnxt_re_reg_dmabuf_mr\n- U rdmacore50_0_bnxt_re_reg_mr\n- U rdmacore50_0_bnxt_re_resize_cq\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_bnxt_re\n+rdmacore50_0_bnxt_re_alloc_aligned in memory.c.o\n+rdmacore50_0_bnxt_re_free_aligned in memory.c.o\n+rdmacore50_0_bnxt_re_ring_rq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_sq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_srq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_srq_arm in db.c.o\n+rdmacore50_0_bnxt_re_ring_cq_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_cq_arm_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_pstart_db in db.c.o\n+rdmacore50_0_bnxt_re_ring_pend_db in db.c.o\n+rdmacore50_0_bnxt_re_fill_push_wcb in db.c.o\n+rdmacore50_0_bnxt_re_init_pbuf_list in db.c.o\n+rdmacore50_0_bnxt_re_get_pbuf in db.c.o\n+rdmacore50_0_bnxt_re_put_pbuf in db.c.o\n+rdmacore50_0_bnxt_re_destroy_pbuf_list in db.c.o\n+verbs_provider_bnxt_re in main.c.o\n \n verbs.c.o:\n 0000000000000000 r .LC0\n 000000000000007f r CSWTCH.132\n 0000000000000078 r CSWTCH.134\n U __errno_location\n U __snprintf_chk\n@@ -208,7 +126,89 @@\n U rdmacore50_0_ibv_cmd_query_device_any\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_query_srq\n U rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_ibv_cmd_resize_cq\n+\n+memory.c.o:\n+ U __errno_location\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+ U memset\n+ U mmap\n+ U munmap\n+0000000000000000 T rdmacore50_0_bnxt_re_alloc_aligned\n+00000000000000b0 T rdmacore50_0_bnxt_re_free_aligned\n+\n+db.c.o:\n+ U __stack_chk_fail\n+0000000000000000 t bnxt_re_do_pacing\n+ U calloc\n+ U clock_gettime\n+ U free\n+00000000000009c0 T rdmacore50_0_bnxt_re_destroy_pbuf_list\n+0000000000000500 T rdmacore50_0_bnxt_re_fill_push_wcb\n+0000000000000920 T rdmacore50_0_bnxt_re_get_pbuf\n+0000000000000600 T rdmacore50_0_bnxt_re_init_pbuf_list\n+ U rdmacore50_0_bnxt_re_notify_drv\n+0000000000000980 T rdmacore50_0_bnxt_re_put_pbuf\n+00000000000003b0 T rdmacore50_0_bnxt_re_ring_cq_arm_db\n+0000000000000350 T rdmacore50_0_bnxt_re_ring_cq_db\n+00000000000004a0 T rdmacore50_0_bnxt_re_ring_pend_db\n+0000000000000440 T rdmacore50_0_bnxt_re_ring_pstart_db\n+00000000000001b0 T rdmacore50_0_bnxt_re_ring_rq_db\n+0000000000000220 T rdmacore50_0_bnxt_re_ring_sq_db\n+00000000000002f0 T rdmacore50_0_bnxt_re_ring_srq_arm\n+0000000000000290 T rdmacore50_0_bnxt_re_ring_srq_db\n+ U rdmacore50_0_xorshift32\n+\n+main.c.o:\n+ U __stack_chk_fail\n+0000000000000120 t bnxt_re_alloc_context\n+0000000000000000 d bnxt_re_cntx_ops\n+0000000000000000 d bnxt_re_dev_ops\n+0000000000000000 t bnxt_re_device_alloc\n+0000000000000020 t bnxt_re_free_context\n+ U calloc\n+0000000000000000 r cna_table\n+0000000000000000 t drv__register_driver\n+ U free\n+ U ibv_query_device\n+ U mmap\n+ U munmap\n+ U pthread_mutex_destroy\n+ U pthread_mutex_init\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_bnxt_re_alloc_page\n+ U rdmacore50_0_bnxt_re_alloc_pd\n+ U rdmacore50_0_bnxt_re_arm_cq\n+ U rdmacore50_0_bnxt_re_async_event\n+ U rdmacore50_0_bnxt_re_create_ah\n+ U rdmacore50_0_bnxt_re_create_cq\n+ U rdmacore50_0_bnxt_re_create_qp\n+ U rdmacore50_0_bnxt_re_create_srq\n+ U rdmacore50_0_bnxt_re_dereg_mr\n+ U rdmacore50_0_bnxt_re_destroy_ah\n+ U rdmacore50_0_bnxt_re_destroy_cq\n+ U rdmacore50_0_bnxt_re_destroy_qp\n+ U rdmacore50_0_bnxt_re_destroy_srq\n+ U rdmacore50_0_bnxt_re_free_pd\n+ U rdmacore50_0_bnxt_re_modify_qp\n+ U rdmacore50_0_bnxt_re_modify_srq\n+ U rdmacore50_0_bnxt_re_poll_cq\n+ U rdmacore50_0_bnxt_re_post_recv\n+ U rdmacore50_0_bnxt_re_post_send\n+ U rdmacore50_0_bnxt_re_post_srq_recv\n+ U rdmacore50_0_bnxt_re_query_device\n+ U rdmacore50_0_bnxt_re_query_port\n+ U rdmacore50_0_bnxt_re_query_qp\n+ U rdmacore50_0_bnxt_re_query_srq\n+ U rdmacore50_0_bnxt_re_reg_dmabuf_mr\n+ U rdmacore50_0_bnxt_re_reg_mr\n+ U rdmacore50_0_bnxt_re_resize_cq\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_bnxt_re\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 1630 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 5592 1970-01-01 00:00:00.000000 db.c.o\n+?rw-r--r-- 0 0 0 29144 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r-- 0 0 0 1912 1970-01-01 00:00:00.000000 memory.c.o\n+?rw-r--r-- 0 0 0 5592 1970-01-01 00:00:00.000000 db.c.o\n ?rw-r--r-- 0 0 0 8632 1970-01-01 00:00:00.000000 main.c.o\n-?rw-r--r-- 0 0 0 29144 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libcxgb4-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libcxgb4-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,23 +1,9 @@\n \n Archive index:\n-rdmacore50_0_c4iw_flush_rq in cq.c.o\n-rdmacore50_0_c4iw_flush_sq in cq.c.o\n-rdmacore50_0_c4iw_flush_hw_cq in cq.c.o\n-rdmacore50_0_c4iw_count_rcqes in cq.c.o\n-rdmacore50_0_c4iw_poll_cq in cq.c.o\n-rdmacore50_0_c4iw_arm_cq in cq.c.o\n-rdmacore50_0_c4iw_flush_srqidx in cq.c.o\n-rdmacore50_0_c4iw_page_size in dev.c.o\n-rdmacore50_0_c4iw_page_shift in dev.c.o\n-rdmacore50_0_c4iw_page_mask in dev.c.o\n-rdmacore50_0_c4iw_abi_version in dev.c.o\n-rdmacore50_0_ma_wr in dev.c.o\n-rdmacore50_0_t5_en_wc in dev.c.o\n-verbs_provider_cxgb4 in dev.c.o\n rdmacore50_0_c4iw_copy_wr_to_srq in qp.c.o\n rdmacore50_0_c4iw_post_send in qp.c.o\n rdmacore50_0_c4iw_post_srq_recv in qp.c.o\n rdmacore50_0_c4iw_post_receive in qp.c.o\n rdmacore50_0_c4iw_flush_qp in qp.c.o\n rdmacore50_0_c4iw_flush_qps in qp.c.o\n rdmacore50_0_c4iw_query_device in verbs.c.o\n@@ -36,14 +22,111 @@\n rdmacore50_0_c4iw_create_qp in verbs.c.o\n rdmacore50_0_c4iw_modify_qp in verbs.c.o\n rdmacore50_0_c4iw_destroy_qp in verbs.c.o\n rdmacore50_0_c4iw_query_qp in verbs.c.o\n rdmacore50_0_c4iw_attach_mcast in verbs.c.o\n rdmacore50_0_c4iw_detach_mcast in verbs.c.o\n rdmacore50_0_c4iw_async_event in verbs.c.o\n+rdmacore50_0_c4iw_flush_rq in cq.c.o\n+rdmacore50_0_c4iw_flush_sq in cq.c.o\n+rdmacore50_0_c4iw_flush_hw_cq in cq.c.o\n+rdmacore50_0_c4iw_count_rcqes in cq.c.o\n+rdmacore50_0_c4iw_poll_cq in cq.c.o\n+rdmacore50_0_c4iw_arm_cq in cq.c.o\n+rdmacore50_0_c4iw_flush_srqidx in cq.c.o\n+rdmacore50_0_c4iw_page_size in dev.c.o\n+rdmacore50_0_c4iw_page_shift in dev.c.o\n+rdmacore50_0_c4iw_page_mask in dev.c.o\n+rdmacore50_0_c4iw_abi_version in dev.c.o\n+rdmacore50_0_ma_wr in dev.c.o\n+rdmacore50_0_t5_en_wc in dev.c.o\n+verbs_provider_cxgb4 in dev.c.o\n+\n+qp.c.o:\n+0000000000000000 r .LC1\n+0000000000000000 r .LC2\n+ U __stack_chk_fail\n+ U memset\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_c4iw_abi_version\n+0000000000000000 T rdmacore50_0_c4iw_copy_wr_to_srq\n+ U rdmacore50_0_c4iw_count_rcqes\n+ U rdmacore50_0_c4iw_flush_hw_cq\n+0000000000002070 T rdmacore50_0_c4iw_flush_qp\n+00000000000022d0 T rdmacore50_0_c4iw_flush_qps\n+ U rdmacore50_0_c4iw_flush_rq\n+ U rdmacore50_0_c4iw_flush_sq\n+ U rdmacore50_0_c4iw_flush_srqidx\n+0000000000001aa0 T rdmacore50_0_c4iw_post_receive\n+0000000000000080 T rdmacore50_0_c4iw_post_send\n+0000000000001570 T rdmacore50_0_c4iw_post_srq_recv\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+ U rdmacore50_0_ma_wr\n+ U rdmacore50_0_t5_en_wc\n+\n+verbs.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U __errno_location\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+ U fwrite\n+ U malloc\n+ U memset\n+ U mmap\n+ U munmap\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+0000000000000100 T rdmacore50_0_c4iw_alloc_pd\n+0000000000001740 T rdmacore50_0_c4iw_async_event\n+0000000000001660 T rdmacore50_0_c4iw_attach_mcast\n+0000000000000330 T rdmacore50_0_c4iw_create_cq\n+0000000000000ab0 T rdmacore50_0_c4iw_create_qp\n+0000000000000690 T rdmacore50_0_c4iw_create_srq\n+00000000000002c0 T rdmacore50_0_c4iw_dereg_mr\n+00000000000005e0 T rdmacore50_0_c4iw_destroy_cq\n+0000000000001460 T rdmacore50_0_c4iw_destroy_qp\n+00000000000009b0 T rdmacore50_0_c4iw_destroy_srq\n+00000000000016d0 T rdmacore50_0_c4iw_detach_mcast\n+ U rdmacore50_0_c4iw_flush_qp\n+0000000000000190 T rdmacore50_0_c4iw_free_pd\n+0000000000001310 T rdmacore50_0_c4iw_modify_qp\n+0000000000000920 T rdmacore50_0_c4iw_modify_srq\n+ U rdmacore50_0_c4iw_page_mask\n+ U rdmacore50_0_c4iw_page_size\n+0000000000000000 T rdmacore50_0_c4iw_query_device\n+00000000000000b0 T rdmacore50_0_c4iw_query_port\n+00000000000015b0 T rdmacore50_0_c4iw_query_qp\n+0000000000000a70 T rdmacore50_0_c4iw_query_srq\n+00000000000001c0 T rdmacore50_0_c4iw_reg_mr\n+ U rdmacore50_0_ibv_cmd_alloc_pd\n+ U rdmacore50_0_ibv_cmd_attach_mcast\n+ U rdmacore50_0_ibv_cmd_create_cq\n+ U rdmacore50_0_ibv_cmd_create_qp\n+ U rdmacore50_0_ibv_cmd_create_srq\n+ U rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_ibv_cmd_dereg_mr\n+ U rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_ibv_cmd_detach_mcast\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+ U rdmacore50_0_ibv_cmd_modify_srq\n+ U rdmacore50_0_ibv_cmd_query_device_any\n+ U rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_cmd_query_qp\n+ U rdmacore50_0_ibv_cmd_query_srq\n+ U rdmacore50_0_ibv_cmd_reg_mr\n+0000000000000000 B rdmacore50_0_is_64b_cqe\n+ U rdmacore50_0_ma_wr\n+ U stderr\n \n cq.c.o:\n 0000000000000000 r .LC0\n 000000000000001e r .LC1\n 0000000000000000 r .LC2\n 0000000000000038 r .LC3\n 0000000000000070 r .LC4\n@@ -129,90 +212,7 @@\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U stderr\n U strtol\n U sysconf\n 0000000000000000 D verbs_provider_cxgb4\n-\n-qp.c.o:\n-0000000000000000 r .LC1\n-0000000000000000 r .LC2\n- U __stack_chk_fail\n- U memset\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_c4iw_abi_version\n-0000000000000000 T rdmacore50_0_c4iw_copy_wr_to_srq\n- U rdmacore50_0_c4iw_count_rcqes\n- U rdmacore50_0_c4iw_flush_hw_cq\n-0000000000002070 T rdmacore50_0_c4iw_flush_qp\n-00000000000022d0 T rdmacore50_0_c4iw_flush_qps\n- U rdmacore50_0_c4iw_flush_rq\n- U rdmacore50_0_c4iw_flush_sq\n- U rdmacore50_0_c4iw_flush_srqidx\n-0000000000001aa0 T rdmacore50_0_c4iw_post_receive\n-0000000000000080 T rdmacore50_0_c4iw_post_send\n-0000000000001570 T rdmacore50_0_c4iw_post_srq_recv\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ma_wr\n- U rdmacore50_0_t5_en_wc\n-\n-verbs.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U __errno_location\n- U __snprintf_chk\n- U __stack_chk_fail\n- U calloc\n- U free\n- U fwrite\n- U malloc\n- U memset\n- U mmap\n- U munmap\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000000100 T rdmacore50_0_c4iw_alloc_pd\n-0000000000001740 T rdmacore50_0_c4iw_async_event\n-0000000000001660 T rdmacore50_0_c4iw_attach_mcast\n-0000000000000330 T rdmacore50_0_c4iw_create_cq\n-0000000000000ab0 T rdmacore50_0_c4iw_create_qp\n-0000000000000690 T rdmacore50_0_c4iw_create_srq\n-00000000000002c0 T rdmacore50_0_c4iw_dereg_mr\n-00000000000005e0 T rdmacore50_0_c4iw_destroy_cq\n-0000000000001460 T rdmacore50_0_c4iw_destroy_qp\n-00000000000009b0 T rdmacore50_0_c4iw_destroy_srq\n-00000000000016d0 T rdmacore50_0_c4iw_detach_mcast\n- U rdmacore50_0_c4iw_flush_qp\n-0000000000000190 T rdmacore50_0_c4iw_free_pd\n-0000000000001310 T rdmacore50_0_c4iw_modify_qp\n-0000000000000920 T rdmacore50_0_c4iw_modify_srq\n- U rdmacore50_0_c4iw_page_mask\n- U rdmacore50_0_c4iw_page_size\n-0000000000000000 T rdmacore50_0_c4iw_query_device\n-00000000000000b0 T rdmacore50_0_c4iw_query_port\n-00000000000015b0 T rdmacore50_0_c4iw_query_qp\n-0000000000000a70 T rdmacore50_0_c4iw_query_srq\n-00000000000001c0 T rdmacore50_0_c4iw_reg_mr\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_create_cq\n- U rdmacore50_0_ibv_cmd_create_qp\n- U rdmacore50_0_ibv_cmd_create_srq\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_query_qp\n- U rdmacore50_0_ibv_cmd_query_srq\n- U rdmacore50_0_ibv_cmd_reg_mr\n-0000000000000000 B rdmacore50_0_is_64b_cqe\n- U rdmacore50_0_ma_wr\n- U stderr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 1282 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 16040 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r-- 0 0 0 12328 1970-01-01 00:00:00.000000 dev.c.o\n ?rw-r--r-- 0 0 0 13640 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r-- 0 0 0 15872 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 16040 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 12328 1970-01-01 00:00:00.000000 dev.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libefa.a", "source2": "./usr/lib/x86_64-linux-gnu/libefa.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,11 +1,9 @@\n \n Archive index:\n-rdmacore50_0_is_efa_dev in efa.c.o\n-verbs_provider_efa in efa.c.o\n rdmacore50_0_efa_query_port in verbs.c.o\n rdmacore50_0_efa_query_device_ex in verbs.c.o\n rdmacore50_0_efa_query_device_ctx in verbs.c.o\n efadv_query_device in verbs.c.o\n rdmacore50_0_efa_alloc_pd in verbs.c.o\n rdmacore50_0_efa_dealloc_pd in verbs.c.o\n rdmacore50_0_efa_reg_dmabuf_mr in verbs.c.o\n@@ -29,67 +27,16 @@\n rdmacore50_0_efa_query_qp_data_in_order in verbs.c.o\n rdmacore50_0_efa_destroy_qp in verbs.c.o\n rdmacore50_0_efa_post_send in verbs.c.o\n rdmacore50_0_efa_post_recv in verbs.c.o\n efadv_query_ah in verbs.c.o\n rdmacore50_0_efa_create_ah in verbs.c.o\n rdmacore50_0_efa_destroy_ah in verbs.c.o\n-\n-efa.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000028 r .LC2\n- U __errno_location\n-0000000000000000 r __func__.0\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n-0000000000000050 t efa_alloc_context\n-0000000000000000 d efa_ctx_ops\n-0000000000000000 d efa_dev_ops\n-0000000000000010 t efa_device_alloc\n-0000000000000210 t efa_free_context\n-0000000000000020 r efa_table\n-0000000000000000 t efa_uninit_device\n- U free\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U rdmacore50_0___verbs_log\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_efa_alloc_pd\n- U rdmacore50_0_efa_arm_cq\n- U rdmacore50_0_efa_cq_event\n- U rdmacore50_0_efa_create_ah\n- U rdmacore50_0_efa_create_cq\n- U rdmacore50_0_efa_create_cq_ex\n- U rdmacore50_0_efa_create_qp\n- U rdmacore50_0_efa_create_qp_ex\n- U rdmacore50_0_efa_dealloc_pd\n- U rdmacore50_0_efa_dereg_mr\n- U rdmacore50_0_efa_destroy_ah\n- U rdmacore50_0_efa_destroy_cq\n- U rdmacore50_0_efa_destroy_qp\n- U rdmacore50_0_efa_modify_qp\n- U rdmacore50_0_efa_poll_cq\n- U rdmacore50_0_efa_post_recv\n- U rdmacore50_0_efa_post_send\n- U rdmacore50_0_efa_query_device_ctx\n- U rdmacore50_0_efa_query_device_ex\n- U rdmacore50_0_efa_query_port\n- U rdmacore50_0_efa_query_qp\n- U rdmacore50_0_efa_query_qp_data_in_order\n- U rdmacore50_0_efa_reg_dmabuf_mr\n- U rdmacore50_0_efa_reg_mr\n- U rdmacore50_0_ibv_cmd_get_context\n-0000000000000260 T rdmacore50_0_is_efa_dev\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n- U sysconf\n-0000000000000000 D verbs_provider_efa\n+rdmacore50_0_is_efa_dev in efa.c.o\n+verbs_provider_efa in efa.c.o\n \n verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 00000000000000f0 r .LC11\n 0000000000000120 r .LC12\n 0000000000000140 r .LC14\n@@ -298,7 +245,60 @@\n U rdmacore50_0_ibv_cmd_modify_qp\n U rdmacore50_0_ibv_cmd_query_device_any\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_is_efa_dev\n+\n+efa.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+0000000000000028 r .LC2\n+ U __errno_location\n+0000000000000000 r __func__.0\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+0000000000000050 t efa_alloc_context\n+0000000000000000 d efa_ctx_ops\n+0000000000000000 d efa_dev_ops\n+0000000000000010 t efa_device_alloc\n+0000000000000210 t efa_free_context\n+0000000000000020 r efa_table\n+0000000000000000 t efa_uninit_device\n+ U free\n+ U pthread_spin_destroy\n+ U pthread_spin_init\n+ U rdmacore50_0___verbs_log\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_efa_alloc_pd\n+ U rdmacore50_0_efa_arm_cq\n+ U rdmacore50_0_efa_cq_event\n+ U rdmacore50_0_efa_create_ah\n+ U rdmacore50_0_efa_create_cq\n+ U rdmacore50_0_efa_create_cq_ex\n+ U rdmacore50_0_efa_create_qp\n+ U rdmacore50_0_efa_create_qp_ex\n+ U rdmacore50_0_efa_dealloc_pd\n+ U rdmacore50_0_efa_dereg_mr\n+ U rdmacore50_0_efa_destroy_ah\n+ U rdmacore50_0_efa_destroy_cq\n+ U rdmacore50_0_efa_destroy_qp\n+ U rdmacore50_0_efa_modify_qp\n+ U rdmacore50_0_efa_poll_cq\n+ U rdmacore50_0_efa_post_recv\n+ U rdmacore50_0_efa_post_send\n+ U rdmacore50_0_efa_query_device_ctx\n+ U rdmacore50_0_efa_query_device_ex\n+ U rdmacore50_0_efa_query_port\n+ U rdmacore50_0_efa_query_qp\n+ U rdmacore50_0_efa_query_qp_data_in_order\n+ U rdmacore50_0_efa_reg_dmabuf_mr\n+ U rdmacore50_0_efa_reg_mr\n+ U rdmacore50_0_ibv_cmd_get_context\n+0000000000000260 T rdmacore50_0_is_efa_dev\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+ U sysconf\n+0000000000000000 D verbs_provider_efa\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n ---------- 0 0 0 988 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 7848 1970-01-01 00:00:00.000000 efa.c.o\n ?rw-r--r-- 0 0 0 60040 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 7848 1970-01-01 00:00:00.000000 efa.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/liberdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/liberdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,12 +1,9 @@\n \n Archive index:\n-verbs_provider_erdma in erdma.c.o\n-rdmacore50_0_erdma_alloc_dbrecords in erdma_db.c.o\n-rdmacore50_0_erdma_dealloc_dbrecords in erdma_db.c.o\n rdmacore50_0_erdma_query_device in erdma_verbs.c.o\n rdmacore50_0_erdma_query_port in erdma_verbs.c.o\n rdmacore50_0_erdma_query_qp in erdma_verbs.c.o\n rdmacore50_0_erdma_alloc_pd in erdma_verbs.c.o\n rdmacore50_0_erdma_free_pd in erdma_verbs.c.o\n rdmacore50_0_erdma_reg_mr in erdma_verbs.c.o\n rdmacore50_0_erdma_dereg_mr in erdma_verbs.c.o\n@@ -17,64 +14,17 @@\n rdmacore50_0_erdma_modify_qp in erdma_verbs.c.o\n rdmacore50_0_erdma_destroy_qp in erdma_verbs.c.o\n rdmacore50_0_erdma_post_send in erdma_verbs.c.o\n rdmacore50_0_erdma_post_recv in erdma_verbs.c.o\n rdmacore50_0_erdma_cq_event in erdma_verbs.c.o\n rdmacore50_0_erdma_poll_cq in erdma_verbs.c.o\n rdmacore50_0_erdma_free_context in erdma_verbs.c.o\n-\n-erdma.c.o:\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n-0000000000000030 t erdma_alloc_context\n-0000000000000000 d erdma_context_ops\n-0000000000000000 d erdma_dev_ops\n-0000000000000010 t erdma_device_alloc\n-0000000000000000 t erdma_device_free\n- U free\n-0000000000000000 r match_table\n- U mmap\n- U munmap\n- U pthread_mutex_init\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_erdma_alloc_pd\n- U rdmacore50_0_erdma_cq_event\n- U rdmacore50_0_erdma_create_cq\n- U rdmacore50_0_erdma_create_qp\n- U rdmacore50_0_erdma_dereg_mr\n- U rdmacore50_0_erdma_destroy_cq\n- U rdmacore50_0_erdma_destroy_qp\n- U rdmacore50_0_erdma_free_context\n- U rdmacore50_0_erdma_free_pd\n- U rdmacore50_0_erdma_modify_qp\n- U rdmacore50_0_erdma_notify_cq\n- U rdmacore50_0_erdma_poll_cq\n- U rdmacore50_0_erdma_post_recv\n- U rdmacore50_0_erdma_post_send\n- U rdmacore50_0_erdma_query_device\n- U rdmacore50_0_erdma_query_port\n- U rdmacore50_0_erdma_query_qp\n- U rdmacore50_0_erdma_reg_mr\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_erdma\n-\n-erdma_db.c.o:\n- U calloc\n- U free\n- U memset\n- U posix_memalign\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_bitmap_find_first_bit\n-0000000000000000 T rdmacore50_0_erdma_alloc_dbrecords\n-0000000000000180 T rdmacore50_0_erdma_dealloc_dbrecords\n+rdmacore50_0_erdma_alloc_dbrecords in erdma_db.c.o\n+rdmacore50_0_erdma_dealloc_dbrecords in erdma_db.c.o\n+verbs_provider_erdma in erdma.c.o\n \n erdma_verbs.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n U __snprintf_chk\n U __stack_chk_fail\n U calloc\n@@ -122,7 +72,57 @@\n U rdmacore50_0_ibv_cmd_modify_qp\n U rdmacore50_0_ibv_cmd_query_device_any\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_verbs_uninit_context\n 00000000000000e0 r wc_mapping_table\n+\n+erdma_db.c.o:\n+ U calloc\n+ U free\n+ U memset\n+ U posix_memalign\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_bitmap_find_first_bit\n+0000000000000000 T rdmacore50_0_erdma_alloc_dbrecords\n+0000000000000180 T rdmacore50_0_erdma_dealloc_dbrecords\n+\n+erdma.c.o:\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+0000000000000030 t erdma_alloc_context\n+0000000000000000 d erdma_context_ops\n+0000000000000000 d erdma_dev_ops\n+0000000000000010 t erdma_device_alloc\n+0000000000000000 t erdma_device_free\n+ U free\n+0000000000000000 r match_table\n+ U mmap\n+ U munmap\n+ U pthread_mutex_init\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_erdma_alloc_pd\n+ U rdmacore50_0_erdma_cq_event\n+ U rdmacore50_0_erdma_create_cq\n+ U rdmacore50_0_erdma_create_qp\n+ U rdmacore50_0_erdma_dereg_mr\n+ U rdmacore50_0_erdma_destroy_cq\n+ U rdmacore50_0_erdma_destroy_qp\n+ U rdmacore50_0_erdma_free_context\n+ U rdmacore50_0_erdma_free_pd\n+ U rdmacore50_0_erdma_modify_qp\n+ U rdmacore50_0_erdma_notify_cq\n+ U rdmacore50_0_erdma_poll_cq\n+ U rdmacore50_0_erdma_post_recv\n+ U rdmacore50_0_erdma_post_send\n+ U rdmacore50_0_erdma_query_device\n+ U rdmacore50_0_erdma_query_port\n+ U rdmacore50_0_erdma_query_qp\n+ U rdmacore50_0_erdma_reg_mr\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_erdma\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 702 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 6272 1970-01-01 00:00:00.000000 erdma.c.o\n-?rw-r--r-- 0 0 0 2592 1970-01-01 00:00:00.000000 erdma_db.c.o\n ?rw-r--r-- 0 0 0 14512 1970-01-01 00:00:00.000000 erdma_verbs.c.o\n+?rw-r--r-- 0 0 0 2592 1970-01-01 00:00:00.000000 erdma_db.c.o\n+?rw-r--r-- 0 0 0 6272 1970-01-01 00:00:00.000000 erdma.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libhfi1verbs-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libhfi1verbs-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,10 +1,9 @@\n \n Archive index:\n-verbs_provider_hfi1verbs in hfiverbs.c.o\n rdmacore50_0_hfi1_query_device in verbs.c.o\n rdmacore50_0_hfi1_query_port in verbs.c.o\n rdmacore50_0_hfi1_alloc_pd in verbs.c.o\n rdmacore50_0_hfi1_free_pd in verbs.c.o\n rdmacore50_0_hfi1_reg_mr in verbs.c.o\n rdmacore50_0_hfi1_dereg_mr in verbs.c.o\n rdmacore50_0_hfi1_create_cq in verbs.c.o\n@@ -28,71 +27,15 @@\n rdmacore50_0_hfi1_modify_srq_v1 in verbs.c.o\n rdmacore50_0_hfi1_query_srq in verbs.c.o\n rdmacore50_0_hfi1_destroy_srq in verbs.c.o\n rdmacore50_0_hfi1_destroy_srq_v1 in verbs.c.o\n rdmacore50_0_hfi1_post_srq_recv in verbs.c.o\n rdmacore50_0_hfi1_create_ah in verbs.c.o\n rdmacore50_0_hfi1_destroy_ah in verbs.c.o\n-\n-hfiverbs.c.o:\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n-0000000000000000 r hca_table\n-0000000000000000 t hf11_uninit_device\n-0000000000000060 t hfi1_alloc_context\n-0000000000000260 d hfi1_ctx_common_ops\n-0000000000000000 d hfi1_ctx_v1_ops\n-0000000000000000 d hfi1_dev_ops\n-0000000000000010 t hfi1_device_alloc\n-0000000000000040 t hfi1_free_context\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_hfi1_alloc_pd\n- U rdmacore50_0_hfi1_create_ah\n- U rdmacore50_0_hfi1_create_cq\n- U rdmacore50_0_hfi1_create_cq_v1\n- U rdmacore50_0_hfi1_create_qp\n- U rdmacore50_0_hfi1_create_qp_v1\n- U rdmacore50_0_hfi1_create_srq\n- U rdmacore50_0_hfi1_create_srq_v1\n- U rdmacore50_0_hfi1_dereg_mr\n- U rdmacore50_0_hfi1_destroy_ah\n- U rdmacore50_0_hfi1_destroy_cq\n- U rdmacore50_0_hfi1_destroy_cq_v1\n- U rdmacore50_0_hfi1_destroy_qp\n- U rdmacore50_0_hfi1_destroy_qp_v1\n- U rdmacore50_0_hfi1_destroy_srq\n- U rdmacore50_0_hfi1_destroy_srq_v1\n- U rdmacore50_0_hfi1_free_pd\n- U rdmacore50_0_hfi1_modify_qp\n- U rdmacore50_0_hfi1_modify_srq\n- U rdmacore50_0_hfi1_modify_srq_v1\n- U rdmacore50_0_hfi1_poll_cq\n- U rdmacore50_0_hfi1_post_recv\n- U rdmacore50_0_hfi1_post_send\n- U rdmacore50_0_hfi1_post_srq_recv\n- U rdmacore50_0_hfi1_query_device\n- U rdmacore50_0_hfi1_query_port\n- U rdmacore50_0_hfi1_query_qp\n- U rdmacore50_0_hfi1_query_srq\n- U rdmacore50_0_hfi1_reg_mr\n- U rdmacore50_0_hfi1_resize_cq\n- U rdmacore50_0_hfi1_resize_cq_v1\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_ibv_cmd_poll_cq\n- U rdmacore50_0_ibv_cmd_post_recv\n- U rdmacore50_0_ibv_cmd_post_srq_recv\n- U rdmacore50_0_ibv_cmd_req_notify_cq\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_hfi1verbs\n+verbs_provider_hfi1verbs in hfiverbs.c.o\n \n verbs.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n U __snprintf_chk\n U __stack_chk_fail\n U free\n@@ -150,7 +93,64 @@\n U rdmacore50_0_ibv_cmd_post_send\n U rdmacore50_0_ibv_cmd_query_device_any\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_query_srq\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_ibv_cmd_resize_cq\n+\n+hfiverbs.c.o:\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+0000000000000000 r hca_table\n+0000000000000000 t hf11_uninit_device\n+0000000000000060 t hfi1_alloc_context\n+0000000000000260 d hfi1_ctx_common_ops\n+0000000000000000 d hfi1_ctx_v1_ops\n+0000000000000000 d hfi1_dev_ops\n+0000000000000010 t hfi1_device_alloc\n+0000000000000040 t hfi1_free_context\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_hfi1_alloc_pd\n+ U rdmacore50_0_hfi1_create_ah\n+ U rdmacore50_0_hfi1_create_cq\n+ U rdmacore50_0_hfi1_create_cq_v1\n+ U rdmacore50_0_hfi1_create_qp\n+ U rdmacore50_0_hfi1_create_qp_v1\n+ U rdmacore50_0_hfi1_create_srq\n+ U rdmacore50_0_hfi1_create_srq_v1\n+ U rdmacore50_0_hfi1_dereg_mr\n+ U rdmacore50_0_hfi1_destroy_ah\n+ U rdmacore50_0_hfi1_destroy_cq\n+ U rdmacore50_0_hfi1_destroy_cq_v1\n+ U rdmacore50_0_hfi1_destroy_qp\n+ U rdmacore50_0_hfi1_destroy_qp_v1\n+ U rdmacore50_0_hfi1_destroy_srq\n+ U rdmacore50_0_hfi1_destroy_srq_v1\n+ U rdmacore50_0_hfi1_free_pd\n+ U rdmacore50_0_hfi1_modify_qp\n+ U rdmacore50_0_hfi1_modify_srq\n+ U rdmacore50_0_hfi1_modify_srq_v1\n+ U rdmacore50_0_hfi1_poll_cq\n+ U rdmacore50_0_hfi1_post_recv\n+ U rdmacore50_0_hfi1_post_send\n+ U rdmacore50_0_hfi1_post_srq_recv\n+ U rdmacore50_0_hfi1_query_device\n+ U rdmacore50_0_hfi1_query_port\n+ U rdmacore50_0_hfi1_query_qp\n+ U rdmacore50_0_hfi1_query_srq\n+ U rdmacore50_0_hfi1_reg_mr\n+ U rdmacore50_0_hfi1_resize_cq\n+ U rdmacore50_0_hfi1_resize_cq_v1\n+ U rdmacore50_0_ibv_cmd_attach_mcast\n+ U rdmacore50_0_ibv_cmd_detach_mcast\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_ibv_cmd_poll_cq\n+ U rdmacore50_0_ibv_cmd_post_recv\n+ U rdmacore50_0_ibv_cmd_post_srq_recv\n+ U rdmacore50_0_ibv_cmd_req_notify_cq\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_hfi1verbs\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n ---------- 0 0 0 1060 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 8152 1970-01-01 00:00:00.000000 hfiverbs.c.o\n ?rw-r--r-- 0 0 0 13792 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 8152 1970-01-01 00:00:00.000000 hfiverbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libhns-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libhns-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,14 +1,13 @@\n \n Archive index:\n-rdmacore50_0_hns_roce_u_v2_post_send in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_v2_clear_qp in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_attach_cq_ex_ops in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_attach_qp_ex_ops in hns_roce_u_hw_v2.c.o\n-rdmacore50_0_hns_roce_u_hw_v2 in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_alloc_buf in hns_roce_u_buf.c.o\n+rdmacore50_0_hns_roce_free_buf in hns_roce_u_buf.c.o\n+rdmacore50_0_hns_roce_alloc_db in hns_roce_u_db.c.o\n+rdmacore50_0_hns_roce_free_db in hns_roce_u_db.c.o\n rdmacore50_0_hns_roce_init_qp_indices in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_query_device in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_query_port in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_alloc_pd in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_free_pd in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_open_xrcd in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_close_xrcd in hns_roce_u_verbs.c.o\n@@ -33,96 +32,42 @@\n rdmacore50_0_hns_roce_free_qp_buf in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_create_qp in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_create_qp_ex in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_open_qp in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_query_qp in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_create_ah in hns_roce_u_verbs.c.o\n rdmacore50_0_hns_roce_u_destroy_ah in hns_roce_u_verbs.c.o\n-rdmacore50_0_hns_roce_alloc_buf in hns_roce_u_buf.c.o\n-rdmacore50_0_hns_roce_free_buf in hns_roce_u_buf.c.o\n-rdmacore50_0_hns_roce_alloc_db in hns_roce_u_db.c.o\n-rdmacore50_0_hns_roce_free_db in hns_roce_u_db.c.o\n+rdmacore50_0_hns_roce_u_v2_post_send in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_v2_clear_qp in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_attach_cq_ex_ops in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_attach_qp_ex_ops in hns_roce_u_hw_v2.c.o\n+rdmacore50_0_hns_roce_u_hw_v2 in hns_roce_u_hw_v2.c.o\n verbs_provider_hns in hns_roce_u.c.o\n \n-hns_roce_u_hw_v2.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-00000000000013e0 t __hns_roce_v2_cq_clean\n- U __stack_chk_fail\n-00000000000002c0 t fill_ext_sge_inl_data\n-0000000000000610 t fill_recv_sge_to_wqe.isra.0\n+hns_roce_u_buf.c.o:\n+ U __errno_location\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+ U mmap\n+ U munmap\n+0000000000000000 T rdmacore50_0_hns_roce_alloc_buf\n+0000000000000090 T rdmacore50_0_hns_roce_free_buf\n+\n+hns_roce_u_db.c.o:\n+ U calloc\n+0000000000000000 r db_size\n U free\n-0000000000000120 r hns_roce_mtu\n-0000000000000140 r hns_roce_opcode\n-0000000000003ed0 t hns_roce_poll_one\n-00000000000004a0 t hns_roce_u_v2_arm_cq\n-0000000000001c20 t hns_roce_u_v2_destroy_qp\n-00000000000015f0 t hns_roce_u_v2_modify_qp\n-0000000000004bd0 t hns_roce_u_v2_poll_cq\n-0000000000001980 t hns_roce_u_v2_post_recv\n-00000000000006c0 t hns_roce_u_v2_post_srq_recv\n-0000000000000560 t hns_roce_write_dwqe\n-0000000000000040 r map.0\n- U memcpy\n U memset\n- U munmap\n-00000000000000c0 r pktype_for_ud\n U pthread_mutex_lock\n U pthread_mutex_unlock\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000004dc0 T rdmacore50_0_hns_roce_attach_cq_ex_ops\n-0000000000004ed0 T rdmacore50_0_hns_roce_attach_qp_ex_ops\n- U rdmacore50_0_hns_roce_find_srq\n- U rdmacore50_0_hns_roce_free_qp_buf\n- U rdmacore50_0_hns_roce_init_qp_indices\n-0000000000000000 D rdmacore50_0_hns_roce_u_hw_v2\n-00000000000024b0 T rdmacore50_0_hns_roce_u_v2_post_send\n-0000000000004d20 T rdmacore50_0_hns_roce_v2_clear_qp\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_modify_qp\n-0000000000000fb0 t wc_end_poll_cq\n-0000000000004a90 t wc_next_poll_cq\n-00000000000000d0 r wc_rcv_op_map\n-0000000000000050 t wc_read_byte_len\n-0000000000000150 t wc_read_cvlan\n-0000000000000140 t wc_read_dlid_path_bits\n-00000000000002a0 t wc_read_imm_data\n-0000000000000000 t wc_read_opcode\n-0000000000000060 t wc_read_qp_num\n-0000000000000120 t wc_read_sl\n-0000000000000110 t wc_read_slid\n-0000000000000080 t wc_read_src_qp\n-0000000000000040 t wc_read_vendor_err\n-00000000000000a0 t wc_read_wc_flags\n-00000000000000e0 r wc_send_op_map\n-0000000000004b40 t wc_start_poll_cq\n-0000000000000280 t wr_abort\n-0000000000003d10 t wr_atomic_cmp_swp\n-0000000000000a80 t wr_atomic_fetch_add\n-0000000000001830 t wr_complete\n-0000000000003560 t wr_rdma_read\n-00000000000036f0 t wr_rdma_write\n-0000000000003b60 t wr_rdma_write_imm\n-0000000000003880 t wr_send_imm_rc\n-0000000000001eb0 t wr_send_imm_ud\n-00000000000033f0 t wr_send_inv_rc\n-0000000000003a10 t wr_send_rc\n-0000000000000940 t wr_send_ud\n-0000000000000c30 t wr_set_inline_data_list_rc\n-0000000000002020 t wr_set_inline_data_list_ud\n-0000000000000e70 t wr_set_inline_data_rc\n-0000000000002300 t wr_set_inline_data_ud\n-0000000000001240 t wr_set_sge_list_rc\n-0000000000001020 t wr_set_sge_list_ud\n-0000000000000180 t wr_set_sge_rc\n-0000000000000200 t wr_set_sge_ud\n-0000000000001140 t wr_set_ud_addr\n-00000000000001d0 t wr_set_xrc_srqn\n-0000000000000510 t wr_start\n+ U rdmacore50_0_bitmap_find_first_bit\n+ U rdmacore50_0_hns_roce_alloc_buf\n+0000000000000000 T rdmacore50_0_hns_roce_alloc_db\n+ U rdmacore50_0_hns_roce_free_buf\n+00000000000001a0 T rdmacore50_0_hns_roce_free_db\n \n hns_roce_u_verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000028 r .LC2\n U __errno_location\n 0000000000000000 r __func__.0\n@@ -204,35 +149,90 @@\n U rdmacore50_0_ibv_cmd_query_port\n U rdmacore50_0_ibv_cmd_query_qp\n U rdmacore50_0_ibv_cmd_query_srq\n U rdmacore50_0_ibv_cmd_reg_mr\n U rdmacore50_0_ibv_cmd_rereg_mr\n U rdmacore50_0_ibv_query_gid_type\n \n-hns_roce_u_buf.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U mmap\n- U munmap\n-0000000000000000 T rdmacore50_0_hns_roce_alloc_buf\n-0000000000000090 T rdmacore50_0_hns_roce_free_buf\n-\n-hns_roce_u_db.c.o:\n- U calloc\n-0000000000000000 r db_size\n+hns_roce_u_hw_v2.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+00000000000013e0 t __hns_roce_v2_cq_clean\n+ U __stack_chk_fail\n+00000000000002c0 t fill_ext_sge_inl_data\n+0000000000000610 t fill_recv_sge_to_wqe.isra.0\n U free\n+0000000000000120 r hns_roce_mtu\n+0000000000000140 r hns_roce_opcode\n+0000000000003ed0 t hns_roce_poll_one\n+00000000000004a0 t hns_roce_u_v2_arm_cq\n+0000000000001c20 t hns_roce_u_v2_destroy_qp\n+00000000000015f0 t hns_roce_u_v2_modify_qp\n+0000000000004bd0 t hns_roce_u_v2_poll_cq\n+0000000000001980 t hns_roce_u_v2_post_recv\n+00000000000006c0 t hns_roce_u_v2_post_srq_recv\n+0000000000000560 t hns_roce_write_dwqe\n+0000000000000040 r map.0\n+ U memcpy\n U memset\n+ U munmap\n+00000000000000c0 r pktype_for_ud\n U pthread_mutex_lock\n U pthread_mutex_unlock\n- U rdmacore50_0_bitmap_find_first_bit\n- U rdmacore50_0_hns_roce_alloc_buf\n-0000000000000000 T rdmacore50_0_hns_roce_alloc_db\n- U rdmacore50_0_hns_roce_free_buf\n-00000000000001a0 T rdmacore50_0_hns_roce_free_db\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+0000000000004dc0 T rdmacore50_0_hns_roce_attach_cq_ex_ops\n+0000000000004ed0 T rdmacore50_0_hns_roce_attach_qp_ex_ops\n+ U rdmacore50_0_hns_roce_find_srq\n+ U rdmacore50_0_hns_roce_free_qp_buf\n+ U rdmacore50_0_hns_roce_init_qp_indices\n+0000000000000000 D rdmacore50_0_hns_roce_u_hw_v2\n+00000000000024b0 T rdmacore50_0_hns_roce_u_v2_post_send\n+0000000000004d20 T rdmacore50_0_hns_roce_v2_clear_qp\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+0000000000000fb0 t wc_end_poll_cq\n+0000000000004a90 t wc_next_poll_cq\n+00000000000000d0 r wc_rcv_op_map\n+0000000000000050 t wc_read_byte_len\n+0000000000000150 t wc_read_cvlan\n+0000000000000140 t wc_read_dlid_path_bits\n+00000000000002a0 t wc_read_imm_data\n+0000000000000000 t wc_read_opcode\n+0000000000000060 t wc_read_qp_num\n+0000000000000120 t wc_read_sl\n+0000000000000110 t wc_read_slid\n+0000000000000080 t wc_read_src_qp\n+0000000000000040 t wc_read_vendor_err\n+00000000000000a0 t wc_read_wc_flags\n+00000000000000e0 r wc_send_op_map\n+0000000000004b40 t wc_start_poll_cq\n+0000000000000280 t wr_abort\n+0000000000003d10 t wr_atomic_cmp_swp\n+0000000000000a80 t wr_atomic_fetch_add\n+0000000000001830 t wr_complete\n+0000000000003560 t wr_rdma_read\n+00000000000036f0 t wr_rdma_write\n+0000000000003b60 t wr_rdma_write_imm\n+0000000000003880 t wr_send_imm_rc\n+0000000000001eb0 t wr_send_imm_ud\n+00000000000033f0 t wr_send_inv_rc\n+0000000000003a10 t wr_send_rc\n+0000000000000940 t wr_send_ud\n+0000000000000c30 t wr_set_inline_data_list_rc\n+0000000000002020 t wr_set_inline_data_list_ud\n+0000000000000e70 t wr_set_inline_data_rc\n+0000000000002300 t wr_set_inline_data_ud\n+0000000000001240 t wr_set_sge_list_rc\n+0000000000001020 t wr_set_sge_list_ud\n+0000000000000180 t wr_set_sge_rc\n+0000000000000200 t wr_set_sge_ud\n+0000000000001140 t wr_set_ud_addr\n+00000000000001d0 t wr_set_xrc_srqn\n+0000000000000510 t wr_start\n \n hns_roce_u.c.o:\n U __stack_chk_fail\n U calloc\n 0000000000000000 t drv__register_driver\n U free\n 0000000000000260 d hca_table\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,7 +1,7 @@\n ---------- 0 0 0 1592 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n-?rw-r--r-- 0 0 0 33832 1970-01-01 00:00:00.000000 hns_roce_u_hw_v2.c.o\n-?rw-r--r-- 0 0 0 23368 1970-01-01 00:00:00.000000 hns_roce_u_verbs.c.o\n ?rw-r--r-- 0 0 0 1808 1970-01-01 00:00:00.000000 hns_roce_u_buf.c.o\n ?rw-r--r-- 0 0 0 2896 1970-01-01 00:00:00.000000 hns_roce_u_db.c.o\n+?rw-r--r-- 0 0 0 23368 1970-01-01 00:00:00.000000 hns_roce_u_verbs.c.o\n+?rw-r--r-- 0 0 0 33832 1970-01-01 00:00:00.000000 hns_roce_u_hw_v2.c.o\n ?rw-r--r-- 0 0 0 8176 1970-01-01 00:00:00.000000 hns_roce_u.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libibverbs.a", "source2": "./usr/lib/x86_64-linux-gnu/libibverbs.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "comments": ["error from `nm -s {}`:", "nm: dynamic_driver.c.o: no symbols", "nm: compat-1_0.c.o: no symbols", "nm: mmio.c.o: no symbols"], "unified_diff": "@@ -1,143 +1,19 @@\n \n Archive index:\n-rdmacore50_0_ibv_cmd_create_counters in cmd_counters.c.o\n-rdmacore50_0_ibv_cmd_destroy_counters in cmd_counters.c.o\n-rdmacore50_0_ibv_cmd_read_counters in cmd_counters.c.o\n-rdmacore50_0_ibv_cmd_dealloc_mw in cmd_mw.c.o\n-ibv_get_device_list in device.c.o\n-ibv_free_device_list in device.c.o\n-ibv_get_device_name in device.c.o\n-ibv_get_device_guid in device.c.o\n-ibv_get_device_index in device.c.o\n-rdmacore50_0_verbs_init_cq in device.c.o\n-rdmacore50_0_verbs_init_context in device.c.o\n-rdmacore50_0__verbs_init_and_alloc_context in device.c.o\n-rdmacore50_0_verbs_open_device in device.c.o\n-ibv_open_device in device.c.o\n-ibv_import_device in device.c.o\n-rdmacore50_0_verbs_uninit_context in device.c.o\n-ibv_close_device in device.c.o\n-ibv_get_async_event in device.c.o\n-ibv_ack_async_event in device.c.o\n-rdmacore50_0_ibv_cmd_create_wq in cmd_wq.c.o\n-rdmacore50_0_ibv_cmd_destroy_wq in cmd_wq.c.o\n-rdmacore50_0_ibv_cmd_create_qp in cmd_qp.c.o\n-rdmacore50_0_ibv_cmd_create_qp_ex in cmd_qp.c.o\n-rdmacore50_0_ibv_cmd_create_qp_ex2 in cmd_qp.c.o\n-rdmacore50_0_ibv_cmd_destroy_qp in cmd_qp.c.o\n-rdmacore50_0_neigh_get_oif_from_src in neigh.c.o\n-rdmacore50_0_neigh_init_resources in neigh.c.o\n-rdmacore50_0_neigh_get_vlan_id_from_dev in neigh.c.o\n-rdmacore50_0_neigh_set_vlan_id in neigh.c.o\n-rdmacore50_0_neigh_set_dst in neigh.c.o\n-rdmacore50_0_neigh_set_src in neigh.c.o\n-rdmacore50_0_neigh_set_oif in neigh.c.o\n-rdmacore50_0_neigh_get_ll in neigh.c.o\n-rdmacore50_0_neigh_free_resources in neigh.c.o\n-rdmacore50_0_process_get_neigh in neigh.c.o\n-rdmacore50_0_ibv_cmd_query_port in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_alloc_async_fd in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_get_context in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_query_context in cmd_device.c.o\n-rdmacore50_0___ibv_query_gid_ex in cmd_device.c.o\n-_ibv_query_gid_ex in cmd_device.c.o\n-_ibv_query_gid_table in cmd_device.c.o\n-rdmacore50_0_ibv_cmd_query_device_any in cmd_device.c.o\n-ibv_copy_ah_attr_from_kern in marshall.c.o\n-ibv_copy_qp_attr_from_kern in marshall.c.o\n-ibv_copy_path_rec_from_kern in marshall.c.o\n-ibv_copy_path_rec_to_kern in marshall.c.o\n+rdmacore50_0_ibv_cmd_destroy_flow in cmd_flow.c.o\n+ibv_static_providers in static_driver.c.o\n+verbs_provider_none in static_driver.c.o\n rdmacore50_0_ibv_cmd_destroy_ah in cmd_ah.c.o\n-rdmacore50_0_ibv_cmd_alloc_pd in cmd.c.o\n-rdmacore50_0_ibv_cmd_open_xrcd in cmd.c.o\n-rdmacore50_0_ibv_cmd_reg_mr in cmd.c.o\n-rdmacore50_0_ibv_cmd_rereg_mr in cmd.c.o\n-rdmacore50_0_ibv_cmd_alloc_mw in cmd.c.o\n-rdmacore50_0_ibv_cmd_poll_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_req_notify_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_resize_cq in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_srq in cmd.c.o\n-rdmacore50_0_ibv_cmd_query_srq in cmd.c.o\n-rdmacore50_0_ibv_cmd_open_qp in cmd.c.o\n-rdmacore50_0_ibv_cmd_query_qp in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_qp in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_qp_ex in cmd.c.o\n-rdmacore50_0_ibv_cmd_post_send in cmd.c.o\n-rdmacore50_0_ibv_cmd_post_recv in cmd.c.o\n-rdmacore50_0_ibv_cmd_post_srq_recv in cmd.c.o\n-rdmacore50_0_ibv_cmd_create_ah in cmd.c.o\n-rdmacore50_0_ibv_cmd_attach_mcast in cmd.c.o\n-rdmacore50_0_ibv_cmd_detach_mcast in cmd.c.o\n-rdmacore50_0_verbs_allow_disassociate_destroy in cmd.c.o\n-rdmacore50_0_ibv_cmd_create_flow in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_wq in cmd.c.o\n-rdmacore50_0_ibv_cmd_create_rwq_ind_table in cmd.c.o\n-rdmacore50_0_ibv_cmd_modify_cq in cmd.c.o\n-ibv_node_type_str in enum_strs.c.o\n-ibv_port_state_str in enum_strs.c.o\n-ibv_event_type_str in enum_strs.c.o\n-ibv_wc_status_str in enum_strs.c.o\n-rdmacore50_0_ibv_wr_opcode_str in enum_strs.c.o\n-rdmacore50_0_ibv_cmd_advise_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_dereg_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_query_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_reg_dmabuf_mr in cmd_mr.c.o\n-rdmacore50_0_ibv_cmd_destroy_rwq_ind_table in cmd_rwq_ind.c.o\n+rdmacore50_0_ibv_cmd_dealloc_pd in cmd_pd.c.o\n+rdmacore50_0_ibv_cmd_dealloc_mw in cmd_mw.c.o\n ibv_get_sysfs_path in sysfs.c.o\n rdmacore50_0_ibv_read_sysfs_file_at in sysfs.c.o\n ibv_read_sysfs_file in sysfs.c.o\n rdmacore50_0_ibv_read_ibdev_sysfs_file in sysfs.c.o\n-rdmacore50_0_ibv_cmd_close_xrcd in cmd_xrcd.c.o\n-verbs_provider_all in all_providers.c.o\n-rdmacore50_0_ibv_cmd_create_flow_action_esp in cmd_flow_action.c.o\n-rdmacore50_0_ibv_cmd_modify_flow_action_esp in cmd_flow_action.c.o\n-rdmacore50_0_ibv_cmd_destroy_flow_action in cmd_flow_action.c.o\n-rdmacore50_0_ibv_cmd_alloc_dm in cmd_dm.c.o\n-rdmacore50_0_ibv_cmd_free_dm in cmd_dm.c.o\n-rdmacore50_0_ibv_cmd_reg_dm_mr in cmd_dm.c.o\n-rdmacore50_0___ioctl_final_num_attrs in cmd_ioctl.c.o\n-rdmacore50_0_execute_ioctl in cmd_ioctl.c.o\n-rdmacore50_0__write_set_uhw in cmd_ioctl.c.o\n-ibv_static_providers in static_driver.c.o\n-verbs_provider_none in static_driver.c.o\n-rdmacore50_0_ibv_cmd_create_srq in cmd_srq.c.o\n-rdmacore50_0_ibv_cmd_create_srq_ex in cmd_srq.c.o\n-rdmacore50_0_ibv_cmd_destroy_srq in cmd_srq.c.o\n-ibv_fork_init in memory.c.o\n-ibv_is_fork_initialized in memory.c.o\n-ibv_dontfork_range in memory.c.o\n-ibv_dofork_range in memory.c.o\n-rdmacore50_0_ibv_cmd_create_cq in cmd_cq.c.o\n-rdmacore50_0_ibv_cmd_create_cq_ex in cmd_cq.c.o\n-rdmacore50_0_ibv_cmd_destroy_cq in cmd_cq.c.o\n-rdmacore50_0__check_legacy in cmd_fallback.c.o\n-rdmacore50_0__execute_ioctl_fallback in cmd_fallback.c.o\n-rdmacore50_0__write_get_req in cmd_fallback.c.o\n-rdmacore50_0__write_get_req_ex in cmd_fallback.c.o\n-rdmacore50_0__write_get_resp in cmd_fallback.c.o\n-rdmacore50_0__write_get_resp_ex in cmd_fallback.c.o\n-rdmacore50_0__execute_cmd_write in cmd_fallback.c.o\n-rdmacore50_0__execute_cmd_write_ex in cmd_fallback.c.o\n-rdmacore50_0_verbs_set_ops in dummy_ops.c.o\n-rdmacore50_0_verbs_dummy_ops in dummy_ops.c.o\n-rdmacore50_0___verbs_log in init.c.o\n-rdmacore50_0_try_access_device in init.c.o\n-rdmacore50_0_decode_knode_type in init.c.o\n-rdmacore50_0_setup_sysfs_uverbs in init.c.o\n-rdmacore50_0_verbs_register_driver_34 in init.c.o\n-rdmacore50_0_ibverbs_get_device_list in init.c.o\n-rdmacore50_0_abi_ver in init.c.o\n-rdmacore50_0_ibverbs_init in init.c.o\n-rdmacore50_0_ibverbs_device_hold in init.c.o\n-rdmacore50_0_ibverbs_device_put in init.c.o\n-rdmacore50_0_ibv_cmd_destroy_flow in cmd_flow.c.o\n-rdmacore50_0_find_sysfs_devs_nl in ibdev_nl.c.o\n-rdmacore50_0_get_copy_on_fork in ibdev_nl.c.o\n-rdmacore50_0_ibv_cmd_dealloc_pd in cmd_pd.c.o\n ibv_rate_to_mult in verbs.c.o\n mult_to_ibv_rate in verbs.c.o\n ibv_rate_to_mbps in verbs.c.o\n mbps_to_ibv_rate in verbs.c.o\n ibv_query_device in verbs.c.o\n rdmacore50_0___lib_query_port in verbs.c.o\n ibv_query_port in verbs.c.o\n@@ -181,129 +57,313 @@\n ibv_create_ah_from_wc in verbs.c.o\n ibv_destroy_ah in verbs.c.o\n ibv_attach_mcast in verbs.c.o\n ibv_detach_mcast in verbs.c.o\n ibv_resolve_eth_l2_from_gid in verbs.c.o\n ibv_set_ece in verbs.c.o\n ibv_query_ece in verbs.c.o\n-rdmacore50_0_open_cdev in open_cdev.c.o\n+rdmacore50_0_ibv_cmd_create_qp in cmd_qp.c.o\n+rdmacore50_0_ibv_cmd_create_qp_ex in cmd_qp.c.o\n+rdmacore50_0_ibv_cmd_create_qp_ex2 in cmd_qp.c.o\n+rdmacore50_0_ibv_cmd_destroy_qp in cmd_qp.c.o\n+rdmacore50_0_ibv_cmd_advise_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_dereg_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_query_mr in cmd_mr.c.o\n+rdmacore50_0_ibv_cmd_reg_dmabuf_mr in cmd_mr.c.o\n+ibv_copy_ah_attr_from_kern in marshall.c.o\n+ibv_copy_qp_attr_from_kern in marshall.c.o\n+ibv_copy_path_rec_from_kern in marshall.c.o\n+ibv_copy_path_rec_to_kern in marshall.c.o\n+rdmacore50_0_ibv_cmd_alloc_dm in cmd_dm.c.o\n+rdmacore50_0_ibv_cmd_free_dm in cmd_dm.c.o\n+rdmacore50_0_ibv_cmd_reg_dm_mr in cmd_dm.c.o\n+rdmacore50_0_ibv_cmd_create_counters in cmd_counters.c.o\n+rdmacore50_0_ibv_cmd_destroy_counters in cmd_counters.c.o\n+rdmacore50_0_ibv_cmd_read_counters in cmd_counters.c.o\n+rdmacore50_0___ioctl_final_num_attrs in cmd_ioctl.c.o\n+rdmacore50_0_execute_ioctl in cmd_ioctl.c.o\n+rdmacore50_0__write_set_uhw in cmd_ioctl.c.o\n+ibv_fork_init in memory.c.o\n+ibv_is_fork_initialized in memory.c.o\n+ibv_dontfork_range in memory.c.o\n+ibv_dofork_range in memory.c.o\n+verbs_provider_all in all_providers.c.o\n+rdmacore50_0_ibv_cmd_close_xrcd in cmd_xrcd.c.o\n+rdmacore50_0_ibv_cmd_create_srq in cmd_srq.c.o\n+rdmacore50_0_ibv_cmd_create_srq_ex in cmd_srq.c.o\n+rdmacore50_0_ibv_cmd_destroy_srq in cmd_srq.c.o\n+rdmacore50_0_verbs_set_ops in dummy_ops.c.o\n+rdmacore50_0_verbs_dummy_ops in dummy_ops.c.o\n+rdmacore50_0___verbs_log in init.c.o\n+rdmacore50_0_try_access_device in init.c.o\n+rdmacore50_0_decode_knode_type in init.c.o\n+rdmacore50_0_setup_sysfs_uverbs in init.c.o\n+rdmacore50_0_verbs_register_driver_34 in init.c.o\n+rdmacore50_0_ibverbs_get_device_list in init.c.o\n+rdmacore50_0_abi_ver in init.c.o\n+rdmacore50_0_ibverbs_init in init.c.o\n+rdmacore50_0_ibverbs_device_hold in init.c.o\n+rdmacore50_0_ibverbs_device_put in init.c.o\n+rdmacore50_0_neigh_get_oif_from_src in neigh.c.o\n+rdmacore50_0_neigh_init_resources in neigh.c.o\n+rdmacore50_0_neigh_get_vlan_id_from_dev in neigh.c.o\n+rdmacore50_0_neigh_set_vlan_id in neigh.c.o\n+rdmacore50_0_neigh_set_dst in neigh.c.o\n+rdmacore50_0_neigh_set_src in neigh.c.o\n+rdmacore50_0_neigh_set_oif in neigh.c.o\n+rdmacore50_0_neigh_get_ll in neigh.c.o\n+rdmacore50_0_neigh_free_resources in neigh.c.o\n+rdmacore50_0_process_get_neigh in neigh.c.o\n+rdmacore50_0_ibv_cmd_create_cq in cmd_cq.c.o\n+rdmacore50_0_ibv_cmd_create_cq_ex in cmd_cq.c.o\n+rdmacore50_0_ibv_cmd_destroy_cq in cmd_cq.c.o\n+ibv_get_device_list in device.c.o\n+ibv_free_device_list in device.c.o\n+ibv_get_device_name in device.c.o\n+ibv_get_device_guid in device.c.o\n+ibv_get_device_index in device.c.o\n+rdmacore50_0_verbs_init_cq in device.c.o\n+rdmacore50_0_verbs_init_context in device.c.o\n+rdmacore50_0__verbs_init_and_alloc_context in device.c.o\n+rdmacore50_0_verbs_open_device in device.c.o\n+ibv_open_device in device.c.o\n+ibv_import_device in device.c.o\n+rdmacore50_0_verbs_uninit_context in device.c.o\n+ibv_close_device in device.c.o\n+ibv_get_async_event in device.c.o\n+ibv_ack_async_event in device.c.o\n+rdmacore50_0_ibv_cmd_destroy_rwq_ind_table in cmd_rwq_ind.c.o\n+rdmacore50_0__check_legacy in cmd_fallback.c.o\n+rdmacore50_0__execute_ioctl_fallback in cmd_fallback.c.o\n+rdmacore50_0__write_get_req in cmd_fallback.c.o\n+rdmacore50_0__write_get_req_ex in cmd_fallback.c.o\n+rdmacore50_0__write_get_resp in cmd_fallback.c.o\n+rdmacore50_0__write_get_resp_ex in cmd_fallback.c.o\n+rdmacore50_0__execute_cmd_write in cmd_fallback.c.o\n+rdmacore50_0__execute_cmd_write_ex in cmd_fallback.c.o\n+rdmacore50_0_find_sysfs_devs_nl in ibdev_nl.c.o\n+rdmacore50_0_get_copy_on_fork in ibdev_nl.c.o\n+ibv_node_type_str in enum_strs.c.o\n+ibv_port_state_str in enum_strs.c.o\n+ibv_event_type_str in enum_strs.c.o\n+ibv_wc_status_str in enum_strs.c.o\n+rdmacore50_0_ibv_wr_opcode_str in enum_strs.c.o\n+rdmacore50_0_ibv_cmd_create_flow_action_esp in cmd_flow_action.c.o\n+rdmacore50_0_ibv_cmd_modify_flow_action_esp in cmd_flow_action.c.o\n+rdmacore50_0_ibv_cmd_destroy_flow_action in cmd_flow_action.c.o\n+rdmacore50_0_ibv_cmd_create_wq in cmd_wq.c.o\n+rdmacore50_0_ibv_cmd_destroy_wq in cmd_wq.c.o\n+rdmacore50_0_ibv_cmd_alloc_pd in cmd.c.o\n+rdmacore50_0_ibv_cmd_open_xrcd in cmd.c.o\n+rdmacore50_0_ibv_cmd_reg_mr in cmd.c.o\n+rdmacore50_0_ibv_cmd_rereg_mr in cmd.c.o\n+rdmacore50_0_ibv_cmd_alloc_mw in cmd.c.o\n+rdmacore50_0_ibv_cmd_poll_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_req_notify_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_resize_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_srq in cmd.c.o\n+rdmacore50_0_ibv_cmd_query_srq in cmd.c.o\n+rdmacore50_0_ibv_cmd_open_qp in cmd.c.o\n+rdmacore50_0_ibv_cmd_query_qp in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_qp in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_qp_ex in cmd.c.o\n+rdmacore50_0_ibv_cmd_post_send in cmd.c.o\n+rdmacore50_0_ibv_cmd_post_recv in cmd.c.o\n+rdmacore50_0_ibv_cmd_post_srq_recv in cmd.c.o\n+rdmacore50_0_ibv_cmd_create_ah in cmd.c.o\n+rdmacore50_0_ibv_cmd_attach_mcast in cmd.c.o\n+rdmacore50_0_ibv_cmd_detach_mcast in cmd.c.o\n+rdmacore50_0_verbs_allow_disassociate_destroy in cmd.c.o\n+rdmacore50_0_ibv_cmd_create_flow in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_wq in cmd.c.o\n+rdmacore50_0_ibv_cmd_create_rwq_ind_table in cmd.c.o\n+rdmacore50_0_ibv_cmd_modify_cq in cmd.c.o\n+rdmacore50_0_ibv_cmd_query_port in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_alloc_async_fd in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_get_context in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_query_context in cmd_device.c.o\n+rdmacore50_0___ibv_query_gid_ex in cmd_device.c.o\n+_ibv_query_gid_ex in cmd_device.c.o\n+_ibv_query_gid_table in cmd_device.c.o\n+rdmacore50_0_ibv_cmd_query_device_any in cmd_device.c.o\n+rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n+rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n+rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n rdmacore50_0_bitmap_find_first_bit in bitmap.c.o\n rdmacore50_0_bitmap_zero_region in bitmap.c.o\n rdmacore50_0_bitmap_fill_region in bitmap.c.o\n rdmacore50_0_bitmap_find_free_region in bitmap.c.o\n+rdmacore50_0_set_fd_nonblock in util.c.o\n+rdmacore50_0_get_random in util.c.o\n+rdmacore50_0_check_env in util.c.o\n+rdmacore50_0_xorshift32 in util.c.o\n rdmacore50_0_cl_qmap_init in cl_map.c.o\n rdmacore50_0_cl_qmap_get in cl_map.c.o\n rdmacore50_0_cl_qmap_get_next in cl_map.c.o\n rdmacore50_0_cl_qmap_apply_func in cl_map.c.o\n rdmacore50_0_cl_qmap_insert in cl_map.c.o\n rdmacore50_0_cl_qmap_remove_item in cl_map.c.o\n rdmacore50_0_cl_qmap_remove in cl_map.c.o\n rdmacore50_0_cl_qmap_merge in cl_map.c.o\n rdmacore50_0_cl_qmap_delta in cl_map.c.o\n-rdmacore50_0_rdmanl_socket_alloc in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_copy_on_fork in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_devices in rdma_nl.c.o\n-rdmacore50_0_rdmanl_get_chardev in rdma_nl.c.o\n-rdmacore50_0_rdmanl_policy in rdma_nl.c.o\n rdmacore50_0_close_node_name_map in node_name_map.c.o\n rdmacore50_0_remap_node_name in node_name_map.c.o\n rdmacore50_0_clean_nodedesc in node_name_map.c.o\n rdmacore50_0_open_node_name_map in node_name_map.c.o\n+rdmacore50_0_open_cdev in open_cdev.c.o\n rdmacore50_0_iset_create in interval_set.c.o\n rdmacore50_0_iset_destroy in interval_set.c.o\n rdmacore50_0_iset_insert_range in interval_set.c.o\n rdmacore50_0_iset_alloc_range in interval_set.c.o\n-rdmacore50_0_set_fd_nonblock in util.c.o\n-rdmacore50_0_get_random in util.c.o\n-rdmacore50_0_check_env in util.c.o\n-rdmacore50_0_xorshift32 in util.c.o\n \n-cmd_counters.c.o:\n+cmd_flow.c.o:\n U __stack_chk_fail\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_create_counters\n-0000000000000190 T rdmacore50_0_ibv_cmd_destroy_counters\n-0000000000000240 T rdmacore50_0_ibv_cmd_read_counters\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_destroy_flow\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+static_driver.c.o:\n+0000000000000000 T ibv_static_providers\n+0000000000000000 R verbs_provider_none\n+\n+cmd_ah.c.o:\n+ U __stack_chk_fail\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_destroy_ah\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_pd.c.o:\n+ U __stack_chk_fail\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_dealloc_pd\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n cmd_mw.c.o:\n U __stack_chk_fail\n U rdmacore50_0__execute_cmd_write\n U rdmacore50_0__execute_ioctl_fallback\n 0000000000000000 T rdmacore50_0_ibv_cmd_dealloc_mw\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-device.c.o:\n+sysfs.c.o:\n 0000000000000000 r .LC0\n-000000000000000a r .LC1\n- U _GLOBAL_OFFSET_TABLE_\n+0000000000000005 r .LC1\n+0000000000000010 r .LC2\n+ U __asprintf_chk\n+ U __errno_location\n+ U __stack_chk_fail\n+ U __vasprintf_chk\n+ U close\n+ U free\n+ U getenv\n+ U geteuid\n+ U getuid\n+0000000000000000 T ibv_get_sysfs_path\n+0000000000000150 T ibv_read_sysfs_file\n+ U openat\n+0000000000000240 T rdmacore50_0_ibv_read_ibdev_sysfs_file\n+00000000000000c0 T rdmacore50_0_ibv_read_sysfs_file_at\n+ U read\n+ U strlen\n+ U strndup\n+0000000000000000 b sysfs_path\n+\n+verbs.c.o:\n+0000000000000000 r .LC0\n+0000000000000012 r .LC1\n+0000000000000140 r CSWTCH.38\n+00000000000000e0 r CSWTCH.41\n U __errno_location\n U __isoc23_sscanf\n-0000000000000000 t __lib_ibv_create_cq_ex\n U __stack_chk_fail\n- U calloc\n U close\n-0000000000000020 b dev_list_lock\n-0000000000000000 d device_list\n U free\n- U fstat\n-0000000000000d00 T ibv_ack_async_event\n-0000000000000c30 T ibv_close_device\n-00000000000001e0 T ibv_free_device_list\n-0000000000000c50 T ibv_get_async_event\n-0000000000000230 T ibv_get_device_guid\n-0000000000000360 T ibv_get_device_index\n-00000000000000d0 T ibv_get_device_list\n-0000000000000220 T ibv_get_device_name\n-00000000000009c0 T ibv_import_device\n-00000000000008b0 T ibv_open_device\n- U ibv_query_device\n- U ibv_query_port\n-0000000000000000 b initialized.0\n+0000000000001010 T ibv_ack_cq_events\n+0000000000000830 T ibv_alloc_pd\n+0000000000001770 T ibv_attach_mcast\n+0000000000001230 T ibv_create_ah\n+0000000000001510 T ibv_create_ah_from_wc\n+0000000000000da0 T ibv_create_comp_channel\n+0000000000000ec0 T ibv_create_cq\n+0000000000001110 T ibv_create_qp\n+0000000000001050 T ibv_create_srq\n+0000000000000850 T ibv_dealloc_pd\n+0000000000000d40 T ibv_dereg_mr\n+0000000000001750 T ibv_destroy_ah\n+0000000000000e50 T ibv_destroy_comp_channel\n+0000000000000f30 T ibv_destroy_cq\n+0000000000001210 T ibv_destroy_qp\n+00000000000010f0 T ibv_destroy_srq\n+0000000000001790 T ibv_detach_mcast\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+0000000000000000 t ibv_find_gid_index\n+0000000000000f90 T ibv_get_cq_event\n+0000000000000760 T ibv_get_pkey_index\n+0000000000000b50 T ibv_import_dm\n+0000000000000b10 T ibv_import_mr\n+0000000000000ae0 T ibv_import_pd\n+00000000000012f0 T ibv_init_ah_from_wc\n+00000000000011d0 T ibv_modify_qp\n+00000000000010b0 T ibv_modify_srq\n+0000000000001130 T ibv_qp_to_qp_ex\n+0000000000000490 T ibv_query_device\n+0000000000001ae0 T ibv_query_ece\n+0000000000000630 T ibv_query_gid\n+00000000000006c0 T ibv_query_pkey\n+00000000000005a0 T ibv_query_port\n+0000000000001150 T ibv_query_qp\n+0000000000001190 T ibv_query_qp_data_in_order\n+00000000000010d0 T ibv_query_srq\n+0000000000000290 T ibv_rate_to_mbps\n+0000000000000150 T ibv_rate_to_mult\n+0000000000000b80 T ibv_reg_dmabuf_mr\n+0000000000000940 T ibv_reg_mr\n+0000000000000a10 T ibv_reg_mr_iova\n+0000000000000870 T ibv_reg_mr_iova2\n+0000000000000bc0 T ibv_rereg_mr\n+0000000000000f10 T ibv_resize_cq\n+00000000000017b0 T ibv_resolve_eth_l2_from_gid\n+0000000000001aa0 T ibv_set_ece\n+0000000000000b60 T ibv_unimport_dm\n+0000000000000b30 T ibv_unimport_mr\n+0000000000000af0 T ibv_unimport_pd\n+ U malloc\n+00000000000002b0 T mbps_to_ibv_rate\n+ U memcpy\n+ U memset\n+0000000000000170 T mult_to_ibv_rate\n U pthread_cond_init\n U pthread_cond_signal\n U pthread_mutex_init\n U pthread_mutex_lock\n U pthread_mutex_unlock\n- U rdmacore50_0___lib_query_port\n-00000000000005a0 T rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_execute_ioctl\n- U rdmacore50_0_ibv_cmd_alloc_async_fd\n+ U rdmacore50_0___ibv_query_gid_ex\n+00000000000004b0 T rdmacore50_0___lib_query_port\n+ U rdmacore50_0__execute_cmd_write\n+0000000000001260 T rdmacore50_0_ibv_query_gid_type\n U rdmacore50_0_ibv_read_ibdev_sysfs_file\n- U rdmacore50_0_ibverbs_device_hold\n- U rdmacore50_0_ibverbs_device_put\n- U rdmacore50_0_ibverbs_get_device_list\n- U rdmacore50_0_ibverbs_init\n- U rdmacore50_0_open_cdev\n- U rdmacore50_0_verbs_dummy_ops\n-00000000000003e0 T rdmacore50_0_verbs_init_context\n-0000000000000380 T rdmacore50_0_verbs_init_cq\n-00000000000007a0 T rdmacore50_0_verbs_open_device\n- U rdmacore50_0_verbs_set_ops\n-0000000000000be0 T rdmacore50_0_verbs_uninit_context\n+ U rdmacore50_0_neigh_free_resources\n+ U rdmacore50_0_neigh_get_ll\n+ U rdmacore50_0_neigh_get_oif_from_src\n+ U rdmacore50_0_neigh_get_vlan_id_from_dev\n+ U rdmacore50_0_neigh_init_resources\n+ U rdmacore50_0_neigh_set_dst\n+ U rdmacore50_0_neigh_set_oif\n+ U rdmacore50_0_neigh_set_src\n+ U rdmacore50_0_neigh_set_vlan_id\n+ U rdmacore50_0_process_get_neigh\n+ U rdmacore50_0_verbs_init_cq\n U read\n \n-cmd_wq.c.o:\n-0000000000000000 r .LC0\n- U __errno_location\n- U __stack_chk_fail\n- U pthread_cond_wait\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req_ex\n- U rdmacore50_0__write_get_resp_ex\n- U rdmacore50_0__write_set_uhw\n-0000000000000000 T rdmacore50_0_ibv_cmd_create_wq\n-0000000000000540 T rdmacore50_0_ibv_cmd_destroy_wq\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n cmd_qp.c.o:\n U __errno_location\n U __stack_chk_fail\n 0000000000000000 t ibv_icmd_create_qp\n U pthread_cond_init\n U pthread_cond_wait\n U pthread_mutex_init\n@@ -321,332 +381,60 @@\n U rdmacore50_0_abi_ver\n 0000000000000c70 T rdmacore50_0_ibv_cmd_create_qp\n 0000000000000df0 T rdmacore50_0_ibv_cmd_create_qp_ex\n 0000000000000ef0 T rdmacore50_0_ibv_cmd_create_qp_ex2\n 0000000000000ff0 T rdmacore50_0_ibv_cmd_destroy_qp\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-neigh.c.o:\n- U __errno_location\n- U __fdelt_chk\n- U __stack_chk_fail\n- U bind\n- U close\n-0000000000000000 d encoded_prefixes\n- U freeaddrinfo\n- U freeifaddrs\n-0000000000000110 t get_link_local_mac_ipv6\n-0000000000000080 t get_mcast_mac_ipv4\n-0000000000000000 t get_mcast_mac_ipv6\n-00000000000001b0 t get_neigh_cb\n-00000000000001e0 t get_neigh_cb_event\n-0000000000000680 t get_route_cb\n-0000000000000240 t get_route_cb_parser\n- U getifaddrs\n- U if_nametoindex\n- U memcmp\n- U memcpy\n- U nl_addr_build\n- U nl_addr_clone\n- U nl_addr_fill_sockaddr\n- U nl_addr_get_binary_addr\n- U nl_addr_get_family\n- U nl_addr_get_len\n- U nl_addr_get_prefixlen\n- U nl_addr_info\n- U nl_addr_put\n- U nl_addr_set_prefixlen\n- U nl_cache_free\n- U nl_cache_mngt_provide\n- U nl_cache_mngt_unprovide\n- U nl_cache_refill\n- U nl_connect\n- U nl_msg_parse\n- U nl_object_match_filter\n- U nl_recvmsgs_default\n- U nl_send_auto\n- U nl_socket_add_membership\n- U nl_socket_alloc\n- U nl_socket_disable_seq_check\n- U nl_socket_free\n- U nl_socket_get_fd\n- U nl_socket_modify_cb\n- U nla_put\n- U nlmsg_alloc_simple\n- U nlmsg_append\n- U nlmsg_free\n-00000000000010c0 T rdmacore50_0_neigh_free_resources\n-0000000000001060 T rdmacore50_0_neigh_get_ll\n-0000000000000cf0 T rdmacore50_0_neigh_get_oif_from_src\n-0000000000000f60 T rdmacore50_0_neigh_get_vlan_id_from_dev\n-0000000000000e10 T rdmacore50_0_neigh_init_resources\n-0000000000000ff0 T rdmacore50_0_neigh_set_dst\n-0000000000001050 T rdmacore50_0_neigh_set_oif\n-0000000000001020 T rdmacore50_0_neigh_set_src\n-0000000000000fd0 T rdmacore50_0_neigh_set_vlan_id\n-00000000000011a0 T rdmacore50_0_process_get_neigh\n- U read\n- U rtnl_link_alloc_cache\n- U rtnl_link_get\n- U rtnl_link_get_addr\n- U rtnl_link_is_vlan\n- U rtnl_link_put\n- U rtnl_link_vlan_get_id\n- U rtnl_neigh_alloc\n- U rtnl_neigh_alloc_cache\n- U rtnl_neigh_get\n- U rtnl_neigh_get_lladdr\n- U rtnl_neigh_put\n- U rtnl_neigh_set_dst\n- U rtnl_neigh_set_ifindex\n- U rtnl_route_alloc_cache\n- U rtnl_route_get_pref_src\n- U rtnl_route_get_type\n- U rtnl_route_nexthop_n\n- U rtnl_route_nh_get_gateway\n- U rtnl_route_nh_get_ifindex\n- U select\n- U sendto\n- U socket\n- U timerfd_create\n- U timerfd_settime\n-\n-cmd_device.c.o:\n-0000000000000000 r .LC0\n-000000000000001c r .LC1\n-0000000000000022 r .LC2\n-000000000000002f r .LC3\n-0000000000000039 r .LC4\n-000000000000004c r .LC6\n-000000000000005d r .LC7\n-0000000000000061 r .LC8\n-0000000000000000 r .LC9\n- U __asprintf_chk\n- U __errno_location\n- U __isoc23_sscanf\n- U __stack_chk_fail\n-00000000000010e0 T _ibv_query_gid_ex\n-0000000000001550 T _ibv_query_gid_table\n- U closedir\n- U free\n- U ibv_query_device\n- U ibv_query_port\n- U if_nametoindex\n- U memset\n- U opendir\n-0000000000000180 t query_gid_table_fb\n-0000000000000000 t query_sysfs_gid_type.isra.0\n-0000000000000c50 T rdmacore50_0___ibv_query_gid_ex\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req\n- U rdmacore50_0__write_get_resp\n- U rdmacore50_0__write_set_uhw\n- U rdmacore50_0_execute_ioctl\n-0000000000000720 T rdmacore50_0_ibv_cmd_alloc_async_fd\n-00000000000007d0 T rdmacore50_0_ibv_cmd_get_context\n-0000000000000ac0 T rdmacore50_0_ibv_cmd_query_context\n-0000000000001740 T rdmacore50_0_ibv_cmd_query_device_any\n-00000000000004d0 T rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_read_ibdev_sysfs_file\n- U strcmp\n-\n-marshall.c.o:\n-0000000000000000 T ibv_copy_ah_attr_from_kern\n-0000000000000100 T ibv_copy_path_rec_from_kern\n-00000000000001a0 T ibv_copy_path_rec_to_kern\n-0000000000000040 T ibv_copy_qp_attr_from_kern\n-\n-cmd_ah.c.o:\n- U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_destroy_ah\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-cmd.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U free\n-0000000000000000 t ibv_cmd_modify_srq_v3\n- U malloc\n- U memcmp\n- U memcpy\n- U memset\n- U pthread_cond_init\n- U pthread_mutex_init\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0_abi_ver\n-00000000000003c0 T rdmacore50_0_ibv_cmd_alloc_mw\n-0000000000000120 T rdmacore50_0_ibv_cmd_alloc_pd\n-0000000000001870 T rdmacore50_0_ibv_cmd_attach_mcast\n-0000000000001790 T rdmacore50_0_ibv_cmd_create_ah\n-0000000000001970 T rdmacore50_0_ibv_cmd_create_flow\n-00000000000020a0 T rdmacore50_0_ibv_cmd_create_rwq_ind_table\n-00000000000018e0 T rdmacore50_0_ibv_cmd_detach_mcast\n-0000000000002210 T rdmacore50_0_ibv_cmd_modify_cq\n-0000000000000a90 T rdmacore50_0_ibv_cmd_modify_qp\n-0000000000000d10 T rdmacore50_0_ibv_cmd_modify_qp_ex\n-0000000000000650 T rdmacore50_0_ibv_cmd_modify_srq\n-0000000000001ff0 T rdmacore50_0_ibv_cmd_modify_wq\n-0000000000000740 T rdmacore50_0_ibv_cmd_open_qp\n-0000000000000170 T rdmacore50_0_ibv_cmd_open_xrcd\n-0000000000000450 T rdmacore50_0_ibv_cmd_poll_cq\n-0000000000001310 T rdmacore50_0_ibv_cmd_post_recv\n-0000000000000fa0 T rdmacore50_0_ibv_cmd_post_send\n-0000000000001550 T rdmacore50_0_ibv_cmd_post_srq_recv\n-0000000000000880 T rdmacore50_0_ibv_cmd_query_qp\n-00000000000006c0 T rdmacore50_0_ibv_cmd_query_srq\n-0000000000000210 T rdmacore50_0_ibv_cmd_reg_mr\n-0000000000000580 T rdmacore50_0_ibv_cmd_req_notify_cq\n-00000000000002e0 T rdmacore50_0_ibv_cmd_rereg_mr\n-00000000000005f0 T rdmacore50_0_ibv_cmd_resize_cq\n-0000000000000000 B rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-enum_strs.c.o:\n-0000000000000000 r .LC0\n-0000000000000140 d event_type_str.2\n-0000000000000050 T ibv_event_type_str\n-0000000000000000 T ibv_node_type_str\n-0000000000000030 T ibv_port_state_str\n-0000000000000070 T ibv_wc_status_str\n-0000000000000220 d node_type_str.4\n-00000000000001e0 d port_state_str.3\n-0000000000000090 T rdmacore50_0_ibv_wr_opcode_str\n-0000000000000080 d wc_status_str.1\n-0000000000000000 d wr_opcode_str.0\n-\n cmd_mr.c.o:\n 0000000000000000 r .LC5\n U __errno_location\n U __stack_chk_fail\n U rdmacore50_0__execute_cmd_write\n U rdmacore50_0__execute_ioctl_fallback\n U rdmacore50_0_execute_ioctl\n 0000000000000000 T rdmacore50_0_ibv_cmd_advise_mr\n 0000000000000130 T rdmacore50_0_ibv_cmd_dereg_mr\n 0000000000000230 T rdmacore50_0_ibv_cmd_query_mr\n 0000000000000360 T rdmacore50_0_ibv_cmd_reg_dmabuf_mr\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-cmd_rwq_ind.c.o:\n- U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write_ex\n- U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-sysfs.c.o:\n-0000000000000000 r .LC0\n-0000000000000005 r .LC1\n-0000000000000010 r .LC2\n- U __asprintf_chk\n- U __errno_location\n- U __stack_chk_fail\n- U __vasprintf_chk\n- U close\n- U free\n- U getenv\n- U geteuid\n- U getuid\n-0000000000000000 T ibv_get_sysfs_path\n-0000000000000150 T ibv_read_sysfs_file\n- U openat\n-0000000000000240 T rdmacore50_0_ibv_read_ibdev_sysfs_file\n-00000000000000c0 T rdmacore50_0_ibv_read_sysfs_file_at\n- U read\n- U strlen\n- U strndup\n-0000000000000000 b sysfs_path\n-\n-cmd_xrcd.c.o:\n- U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_close_xrcd\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n-all_providers.c.o:\n-0000000000000000 d all_providers\n-0000000000000000 D verbs_provider_all\n- U verbs_provider_bnxt_re\n- U verbs_provider_cxgb4\n- U verbs_provider_efa\n- U verbs_provider_erdma\n- U verbs_provider_hfi1verbs\n- U verbs_provider_hns\n- U verbs_provider_ipathverbs\n- U verbs_provider_irdma\n- U verbs_provider_mana\n- U verbs_provider_mlx4\n- U verbs_provider_mlx5\n- U verbs_provider_mthca\n- U verbs_provider_ocrdma\n- U verbs_provider_qedr\n- U verbs_provider_rxe\n- U verbs_provider_siw\n- U verbs_provider_vmw_pvrdma\n+marshall.c.o:\n+0000000000000000 T ibv_copy_ah_attr_from_kern\n+0000000000000100 T ibv_copy_path_rec_from_kern\n+00000000000001a0 T ibv_copy_path_rec_to_kern\n+0000000000000040 T ibv_copy_qp_attr_from_kern\n \n-cmd_flow_action.c.o:\n+cmd_dm.c.o:\n U __errno_location\n U __stack_chk_fail\n- U memcpy\n U rdmacore50_0___ioctl_final_num_attrs\n U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_create_flow_action_esp\n-0000000000000620 T rdmacore50_0_ibv_cmd_destroy_flow_action\n-0000000000000330 T rdmacore50_0_ibv_cmd_modify_flow_action_esp\n+0000000000000000 T rdmacore50_0_ibv_cmd_alloc_dm\n+00000000000001e0 T rdmacore50_0_ibv_cmd_free_dm\n+0000000000000290 T rdmacore50_0_ibv_cmd_reg_dm_mr\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-cmd_dm.c.o:\n- U __errno_location\n+cmd_counters.c.o:\n U __stack_chk_fail\n U rdmacore50_0___ioctl_final_num_attrs\n U rdmacore50_0_execute_ioctl\n-0000000000000000 T rdmacore50_0_ibv_cmd_alloc_dm\n-00000000000001e0 T rdmacore50_0_ibv_cmd_free_dm\n-0000000000000290 T rdmacore50_0_ibv_cmd_reg_dm_mr\n+0000000000000000 T rdmacore50_0_ibv_cmd_create_counters\n+0000000000000190 T rdmacore50_0_ibv_cmd_destroy_counters\n+0000000000000240 T rdmacore50_0_ibv_cmd_read_counters\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n cmd_ioctl.c.o:\n U __errno_location\n U __stack_chk_fail\n U ioctl\n 0000000000000000 T rdmacore50_0___ioctl_final_num_attrs\n 0000000000000350 T rdmacore50_0__write_set_uhw\n 0000000000000030 T rdmacore50_0_execute_ioctl\n \n-static_driver.c.o:\n-0000000000000000 T ibv_static_providers\n-0000000000000000 R verbs_provider_none\n-\n-cmd_srq.c.o:\n- U __errno_location\n- U __stack_chk_fail\n-0000000000000000 t ibv_icmd_create_srq\n- U pthread_cond_init\n- U pthread_cond_wait\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0___ioctl_final_num_attrs\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_ioctl_fallback\n- U rdmacore50_0__write_get_req\n- U rdmacore50_0__write_get_resp\n- U rdmacore50_0__write_set_uhw\n- U rdmacore50_0_abi_ver\n-00000000000007d0 T rdmacore50_0_ibv_cmd_create_srq\n-00000000000008f0 T rdmacore50_0_ibv_cmd_create_srq_ex\n-0000000000000a00 T rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_verbs_allow_disassociate_destroy\n-\n memory.c.o:\n 0000000000000000 r .LC0\n 000000000000000f r .LC1\n 0000000000000012 r .LC2\n 000000000000001a r .LC3\n 000000000000002a r .LC4\n 0000000000000032 r .LC7\n@@ -681,53 +469,63 @@\n U rdmacore50_0_get_copy_on_fork\n 0000000000000710 t split_range\n 0000000000000000 t split_range.cold\n U strstr\n U sysconf\n 0000000000000000 b too_late\n \n-cmd_cq.c.o:\n+all_providers.c.o:\n+0000000000000000 d all_providers\n+0000000000000000 D verbs_provider_all\n+ U verbs_provider_bnxt_re\n+ U verbs_provider_cxgb4\n+ U verbs_provider_efa\n+ U verbs_provider_erdma\n+ U verbs_provider_hfi1verbs\n+ U verbs_provider_hns\n+ U verbs_provider_ipathverbs\n+ U verbs_provider_irdma\n+ U verbs_provider_mana\n+ U verbs_provider_mlx4\n+ U verbs_provider_mlx5\n+ U verbs_provider_mthca\n+ U verbs_provider_ocrdma\n+ U verbs_provider_qedr\n+ U verbs_provider_rxe\n+ U verbs_provider_siw\n+ U verbs_provider_vmw_pvrdma\n+\n+cmd_xrcd.c.o:\n U __stack_chk_fail\n-0000000000000000 t ibv_icmd_create_cq\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_close_xrcd\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_srq.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+0000000000000000 t ibv_icmd_create_srq\n+ U pthread_cond_init\n U pthread_cond_wait\n+ U pthread_mutex_init\n U pthread_mutex_lock\n U pthread_mutex_unlock\n U rdmacore50_0___ioctl_final_num_attrs\n U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_cmd_write_ex\n U rdmacore50_0__execute_ioctl_fallback\n U rdmacore50_0__write_get_req\n- U rdmacore50_0__write_get_req_ex\n U rdmacore50_0__write_get_resp\n- U rdmacore50_0__write_get_resp_ex\n U rdmacore50_0__write_set_uhw\n-0000000000000510 T rdmacore50_0_ibv_cmd_create_cq\n-0000000000000610 T rdmacore50_0_ibv_cmd_create_cq_ex\n-0000000000000730 T rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_abi_ver\n+00000000000007d0 T rdmacore50_0_ibv_cmd_create_srq\n+00000000000008f0 T rdmacore50_0_ibv_cmd_create_srq_ex\n+0000000000000a00 T rdmacore50_0_ibv_cmd_destroy_srq\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-cmd_fallback.c.o:\n- U __errno_location\n- U __stack_chk_fail\n-0000000000000000 t ioctl_write\n- U memcpy\n- U memset\n-00000000000002b0 T rdmacore50_0__check_legacy\n-0000000000000680 T rdmacore50_0__execute_cmd_write\n-00000000000007b0 T rdmacore50_0__execute_cmd_write_ex\n-0000000000000350 T rdmacore50_0__execute_ioctl_fallback\n-0000000000000570 T rdmacore50_0__write_get_req\n-00000000000005c0 T rdmacore50_0__write_get_req_ex\n-0000000000000600 T rdmacore50_0__write_get_resp\n-0000000000000640 T rdmacore50_0__write_get_resp_ex\n- U rdmacore50_0_execute_ioctl\n- U write\n-\n-dynamic_driver.c.o:\n-\n dummy_ops.c.o:\n U __errno_location\n 0000000000000000 t advise_mr\n 00000000000001d0 t alloc_dm\n 00000000000001b0 t alloc_mw\n 0000000000000190 t alloc_null_mr\n 0000000000000550 t alloc_parent_domain\n@@ -888,23 +686,193 @@\n U strcmp\n U strcpy\n 0000000000000450 t try_all_drivers\n 0000000000000000 t try_driver\n 0000000000000008 b verbs_log_fp\n 0000000000000010 b verbs_log_level\n \n-compat-1_0.c.o:\n+neigh.c.o:\n+ U __errno_location\n+ U __fdelt_chk\n+ U __stack_chk_fail\n+ U bind\n+ U close\n+0000000000000000 d encoded_prefixes\n+ U freeaddrinfo\n+ U freeifaddrs\n+0000000000000110 t get_link_local_mac_ipv6\n+0000000000000080 t get_mcast_mac_ipv4\n+0000000000000000 t get_mcast_mac_ipv6\n+00000000000001b0 t get_neigh_cb\n+00000000000001e0 t get_neigh_cb_event\n+0000000000000680 t get_route_cb\n+0000000000000240 t get_route_cb_parser\n+ U getifaddrs\n+ U if_nametoindex\n+ U memcmp\n+ U memcpy\n+ U nl_addr_build\n+ U nl_addr_clone\n+ U nl_addr_fill_sockaddr\n+ U nl_addr_get_binary_addr\n+ U nl_addr_get_family\n+ U nl_addr_get_len\n+ U nl_addr_get_prefixlen\n+ U nl_addr_info\n+ U nl_addr_put\n+ U nl_addr_set_prefixlen\n+ U nl_cache_free\n+ U nl_cache_mngt_provide\n+ U nl_cache_mngt_unprovide\n+ U nl_cache_refill\n+ U nl_connect\n+ U nl_msg_parse\n+ U nl_object_match_filter\n+ U nl_recvmsgs_default\n+ U nl_send_auto\n+ U nl_socket_add_membership\n+ U nl_socket_alloc\n+ U nl_socket_disable_seq_check\n+ U nl_socket_free\n+ U nl_socket_get_fd\n+ U nl_socket_modify_cb\n+ U nla_put\n+ U nlmsg_alloc_simple\n+ U nlmsg_append\n+ U nlmsg_free\n+00000000000010c0 T rdmacore50_0_neigh_free_resources\n+0000000000001060 T rdmacore50_0_neigh_get_ll\n+0000000000000cf0 T rdmacore50_0_neigh_get_oif_from_src\n+0000000000000f60 T rdmacore50_0_neigh_get_vlan_id_from_dev\n+0000000000000e10 T rdmacore50_0_neigh_init_resources\n+0000000000000ff0 T rdmacore50_0_neigh_set_dst\n+0000000000001050 T rdmacore50_0_neigh_set_oif\n+0000000000001020 T rdmacore50_0_neigh_set_src\n+0000000000000fd0 T rdmacore50_0_neigh_set_vlan_id\n+00000000000011a0 T rdmacore50_0_process_get_neigh\n+ U read\n+ U rtnl_link_alloc_cache\n+ U rtnl_link_get\n+ U rtnl_link_get_addr\n+ U rtnl_link_is_vlan\n+ U rtnl_link_put\n+ U rtnl_link_vlan_get_id\n+ U rtnl_neigh_alloc\n+ U rtnl_neigh_alloc_cache\n+ U rtnl_neigh_get\n+ U rtnl_neigh_get_lladdr\n+ U rtnl_neigh_put\n+ U rtnl_neigh_set_dst\n+ U rtnl_neigh_set_ifindex\n+ U rtnl_route_alloc_cache\n+ U rtnl_route_get_pref_src\n+ U rtnl_route_get_type\n+ U rtnl_route_nexthop_n\n+ U rtnl_route_nh_get_gateway\n+ U rtnl_route_nh_get_ifindex\n+ U select\n+ U sendto\n+ U socket\n+ U timerfd_create\n+ U timerfd_settime\n \n-cmd_flow.c.o:\n+cmd_cq.c.o:\n U __stack_chk_fail\n+0000000000000000 t ibv_icmd_create_cq\n+ U pthread_cond_wait\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write\n U rdmacore50_0__execute_cmd_write_ex\n U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_destroy_flow\n+ U rdmacore50_0__write_get_req\n+ U rdmacore50_0__write_get_req_ex\n+ U rdmacore50_0__write_get_resp\n+ U rdmacore50_0__write_get_resp_ex\n+ U rdmacore50_0__write_set_uhw\n+0000000000000510 T rdmacore50_0_ibv_cmd_create_cq\n+0000000000000610 T rdmacore50_0_ibv_cmd_create_cq_ex\n+0000000000000730 T rdmacore50_0_ibv_cmd_destroy_cq\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n+device.c.o:\n+0000000000000000 r .LC0\n+000000000000000a r .LC1\n+ U _GLOBAL_OFFSET_TABLE_\n+ U __errno_location\n+ U __isoc23_sscanf\n+0000000000000000 t __lib_ibv_create_cq_ex\n+ U __stack_chk_fail\n+ U calloc\n+ U close\n+0000000000000020 b dev_list_lock\n+0000000000000000 d device_list\n+ U free\n+ U fstat\n+0000000000000d00 T ibv_ack_async_event\n+0000000000000c30 T ibv_close_device\n+00000000000001e0 T ibv_free_device_list\n+0000000000000c50 T ibv_get_async_event\n+0000000000000230 T ibv_get_device_guid\n+0000000000000360 T ibv_get_device_index\n+00000000000000d0 T ibv_get_device_list\n+0000000000000220 T ibv_get_device_name\n+00000000000009c0 T ibv_import_device\n+00000000000008b0 T ibv_open_device\n+ U ibv_query_device\n+ U ibv_query_port\n+0000000000000000 b initialized.0\n+ U pthread_cond_init\n+ U pthread_cond_signal\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0___lib_query_port\n+00000000000005a0 T rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_execute_ioctl\n+ U rdmacore50_0_ibv_cmd_alloc_async_fd\n+ U rdmacore50_0_ibv_read_ibdev_sysfs_file\n+ U rdmacore50_0_ibverbs_device_hold\n+ U rdmacore50_0_ibverbs_device_put\n+ U rdmacore50_0_ibverbs_get_device_list\n+ U rdmacore50_0_ibverbs_init\n+ U rdmacore50_0_open_cdev\n+ U rdmacore50_0_verbs_dummy_ops\n+00000000000003e0 T rdmacore50_0_verbs_init_context\n+0000000000000380 T rdmacore50_0_verbs_init_cq\n+00000000000007a0 T rdmacore50_0_verbs_open_device\n+ U rdmacore50_0_verbs_set_ops\n+0000000000000be0 T rdmacore50_0_verbs_uninit_context\n+ U read\n+\n+cmd_rwq_ind.c.o:\n+ U __stack_chk_fail\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+0000000000000000 T rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+cmd_fallback.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n+0000000000000000 t ioctl_write\n+ U memcpy\n+ U memset\n+00000000000002b0 T rdmacore50_0__check_legacy\n+0000000000000680 T rdmacore50_0__execute_cmd_write\n+00000000000007b0 T rdmacore50_0__execute_cmd_write_ex\n+0000000000000350 T rdmacore50_0__execute_ioctl_fallback\n+0000000000000570 T rdmacore50_0__write_get_req\n+00000000000005c0 T rdmacore50_0__write_get_req_ex\n+0000000000000600 T rdmacore50_0__write_get_resp\n+0000000000000640 T rdmacore50_0__write_get_resp_ex\n+ U rdmacore50_0_execute_ioctl\n+ U write\n+\n ibdev_nl.c.o:\n 0000000000000000 r .LC0\n 0000000000000003 r .LC1\n 000000000000001a r .LC2\n 0000000000000021 r .LC3\n U __snprintf_chk\n U __stack_chk_fail\n@@ -936,145 +904,142 @@\n U rdmacore50_0_rdmanl_policy\n U rdmacore50_0_rdmanl_socket_alloc\n U rdmacore50_0_setup_sysfs_uverbs\n U rdmacore50_0_try_access_device\n U readdir\n U snprintf\n \n-cmd_pd.c.o:\n+enum_strs.c.o:\n+0000000000000000 r .LC0\n+0000000000000140 d event_type_str.2\n+0000000000000050 T ibv_event_type_str\n+0000000000000000 T ibv_node_type_str\n+0000000000000030 T ibv_port_state_str\n+0000000000000070 T ibv_wc_status_str\n+0000000000000220 d node_type_str.4\n+00000000000001e0 d port_state_str.3\n+0000000000000090 T rdmacore50_0_ibv_wr_opcode_str\n+0000000000000080 d wc_status_str.1\n+0000000000000000 d wr_opcode_str.0\n+\n+dynamic_driver.c.o:\n+\n+cmd_flow_action.c.o:\n+ U __errno_location\n U __stack_chk_fail\n- U rdmacore50_0__execute_cmd_write\n- U rdmacore50_0__execute_ioctl_fallback\n-0000000000000000 T rdmacore50_0_ibv_cmd_dealloc_pd\n+ U memcpy\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0_execute_ioctl\n+0000000000000000 T rdmacore50_0_ibv_cmd_create_flow_action_esp\n+0000000000000620 T rdmacore50_0_ibv_cmd_destroy_flow_action\n+0000000000000330 T rdmacore50_0_ibv_cmd_modify_flow_action_esp\n U rdmacore50_0_verbs_allow_disassociate_destroy\n \n-verbs.c.o:\n+cmd_wq.c.o:\n 0000000000000000 r .LC0\n-0000000000000012 r .LC1\n-0000000000000140 r CSWTCH.38\n-00000000000000e0 r CSWTCH.41\n U __errno_location\n- U __isoc23_sscanf\n U __stack_chk_fail\n- U close\n+ U pthread_cond_wait\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0__write_get_req_ex\n+ U rdmacore50_0__write_get_resp_ex\n+ U rdmacore50_0__write_set_uhw\n+0000000000000000 T rdmacore50_0_ibv_cmd_create_wq\n+0000000000000540 T rdmacore50_0_ibv_cmd_destroy_wq\n+ U rdmacore50_0_verbs_allow_disassociate_destroy\n+\n+compat-1_0.c.o:\n+\n+cmd.c.o:\n+ U __errno_location\n+ U __stack_chk_fail\n U free\n-0000000000001010 T ibv_ack_cq_events\n-0000000000000830 T ibv_alloc_pd\n-0000000000001770 T ibv_attach_mcast\n-0000000000001230 T ibv_create_ah\n-0000000000001510 T ibv_create_ah_from_wc\n-0000000000000da0 T ibv_create_comp_channel\n-0000000000000ec0 T ibv_create_cq\n-0000000000001110 T ibv_create_qp\n-0000000000001050 T ibv_create_srq\n-0000000000000850 T ibv_dealloc_pd\n-0000000000000d40 T ibv_dereg_mr\n-0000000000001750 T ibv_destroy_ah\n-0000000000000e50 T ibv_destroy_comp_channel\n-0000000000000f30 T ibv_destroy_cq\n-0000000000001210 T ibv_destroy_qp\n-00000000000010f0 T ibv_destroy_srq\n-0000000000001790 T ibv_detach_mcast\n- U ibv_dofork_range\n- U ibv_dontfork_range\n-0000000000000000 t ibv_find_gid_index\n-0000000000000f90 T ibv_get_cq_event\n-0000000000000760 T ibv_get_pkey_index\n-0000000000000b50 T ibv_import_dm\n-0000000000000b10 T ibv_import_mr\n-0000000000000ae0 T ibv_import_pd\n-00000000000012f0 T ibv_init_ah_from_wc\n-00000000000011d0 T ibv_modify_qp\n-00000000000010b0 T ibv_modify_srq\n-0000000000001130 T ibv_qp_to_qp_ex\n-0000000000000490 T ibv_query_device\n-0000000000001ae0 T ibv_query_ece\n-0000000000000630 T ibv_query_gid\n-00000000000006c0 T ibv_query_pkey\n-00000000000005a0 T ibv_query_port\n-0000000000001150 T ibv_query_qp\n-0000000000001190 T ibv_query_qp_data_in_order\n-00000000000010d0 T ibv_query_srq\n-0000000000000290 T ibv_rate_to_mbps\n-0000000000000150 T ibv_rate_to_mult\n-0000000000000b80 T ibv_reg_dmabuf_mr\n-0000000000000940 T ibv_reg_mr\n-0000000000000a10 T ibv_reg_mr_iova\n-0000000000000870 T ibv_reg_mr_iova2\n-0000000000000bc0 T ibv_rereg_mr\n-0000000000000f10 T ibv_resize_cq\n-00000000000017b0 T ibv_resolve_eth_l2_from_gid\n-0000000000001aa0 T ibv_set_ece\n-0000000000000b60 T ibv_unimport_dm\n-0000000000000b30 T ibv_unimport_mr\n-0000000000000af0 T ibv_unimport_pd\n+0000000000000000 t ibv_cmd_modify_srq_v3\n U malloc\n-00000000000002b0 T mbps_to_ibv_rate\n+ U memcmp\n U memcpy\n U memset\n-0000000000000170 T mult_to_ibv_rate\n U pthread_cond_init\n- U pthread_cond_signal\n U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0___ibv_query_gid_ex\n-00000000000004b0 T rdmacore50_0___lib_query_port\n U rdmacore50_0__execute_cmd_write\n-0000000000001260 T rdmacore50_0_ibv_query_gid_type\n- U rdmacore50_0_ibv_read_ibdev_sysfs_file\n- U rdmacore50_0_neigh_free_resources\n- U rdmacore50_0_neigh_get_ll\n- U rdmacore50_0_neigh_get_oif_from_src\n- U rdmacore50_0_neigh_get_vlan_id_from_dev\n- U rdmacore50_0_neigh_init_resources\n- U rdmacore50_0_neigh_set_dst\n- U rdmacore50_0_neigh_set_oif\n- U rdmacore50_0_neigh_set_src\n- U rdmacore50_0_neigh_set_vlan_id\n- U rdmacore50_0_process_get_neigh\n- U rdmacore50_0_verbs_init_cq\n- U read\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0_abi_ver\n+00000000000003c0 T rdmacore50_0_ibv_cmd_alloc_mw\n+0000000000000120 T rdmacore50_0_ibv_cmd_alloc_pd\n+0000000000001870 T rdmacore50_0_ibv_cmd_attach_mcast\n+0000000000001790 T rdmacore50_0_ibv_cmd_create_ah\n+0000000000001970 T rdmacore50_0_ibv_cmd_create_flow\n+00000000000020a0 T rdmacore50_0_ibv_cmd_create_rwq_ind_table\n+00000000000018e0 T rdmacore50_0_ibv_cmd_detach_mcast\n+0000000000002210 T rdmacore50_0_ibv_cmd_modify_cq\n+0000000000000a90 T rdmacore50_0_ibv_cmd_modify_qp\n+0000000000000d10 T rdmacore50_0_ibv_cmd_modify_qp_ex\n+0000000000000650 T rdmacore50_0_ibv_cmd_modify_srq\n+0000000000001ff0 T rdmacore50_0_ibv_cmd_modify_wq\n+0000000000000740 T rdmacore50_0_ibv_cmd_open_qp\n+0000000000000170 T rdmacore50_0_ibv_cmd_open_xrcd\n+0000000000000450 T rdmacore50_0_ibv_cmd_poll_cq\n+0000000000001310 T rdmacore50_0_ibv_cmd_post_recv\n+0000000000000fa0 T rdmacore50_0_ibv_cmd_post_send\n+0000000000001550 T rdmacore50_0_ibv_cmd_post_srq_recv\n+0000000000000880 T rdmacore50_0_ibv_cmd_query_qp\n+00000000000006c0 T rdmacore50_0_ibv_cmd_query_srq\n+0000000000000210 T rdmacore50_0_ibv_cmd_reg_mr\n+0000000000000580 T rdmacore50_0_ibv_cmd_req_notify_cq\n+00000000000002e0 T rdmacore50_0_ibv_cmd_rereg_mr\n+00000000000005f0 T rdmacore50_0_ibv_cmd_resize_cq\n+0000000000000000 B rdmacore50_0_verbs_allow_disassociate_destroy\n \n-open_cdev.c.o:\n+cmd_device.c.o:\n 0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-000000000000001b r .LC2\n+000000000000001c r .LC1\n+0000000000000022 r .LC2\n+000000000000002f r .LC3\n+0000000000000039 r .LC4\n+000000000000004c r .LC6\n+000000000000005d r .LC7\n+0000000000000061 r .LC8\n+0000000000000000 r .LC9\n U __asprintf_chk\n+ U __errno_location\n+ U __isoc23_sscanf\n U __stack_chk_fail\n- U close\n+00000000000010e0 T _ibv_query_gid_ex\n+0000000000001550 T _ibv_query_gid_table\n+ U closedir\n U free\n- U fstat\n- U inotify_add_watch\n- U inotify_init1\n- U open\n-0000000000000000 t open_cdev_robust.isra.0\n- U poll\n-0000000000000380 T rdmacore50_0_open_cdev\n- U read\n- U timerfd_create\n- U timerfd_settime\n-\n-bitmap.c.o:\n+ U ibv_query_device\n+ U ibv_query_port\n+ U if_nametoindex\n U memset\n-0000000000000160 T rdmacore50_0_bitmap_fill_region\n-0000000000000000 T rdmacore50_0_bitmap_find_first_bit\n-0000000000000220 T rdmacore50_0_bitmap_find_free_region\n-0000000000000090 T rdmacore50_0_bitmap_zero_region\n+ U opendir\n+0000000000000180 t query_gid_table_fb\n+0000000000000000 t query_sysfs_gid_type.isra.0\n+0000000000000c50 T rdmacore50_0___ibv_query_gid_ex\n+ U rdmacore50_0___ioctl_final_num_attrs\n+ U rdmacore50_0__execute_cmd_write\n+ U rdmacore50_0__execute_cmd_write_ex\n+ U rdmacore50_0__execute_ioctl_fallback\n+ U rdmacore50_0__write_get_req\n+ U rdmacore50_0__write_get_resp\n+ U rdmacore50_0__write_set_uhw\n+ U rdmacore50_0_execute_ioctl\n+0000000000000720 T rdmacore50_0_ibv_cmd_alloc_async_fd\n+00000000000007d0 T rdmacore50_0_ibv_cmd_get_context\n+0000000000000ac0 T rdmacore50_0_ibv_cmd_query_context\n+0000000000001740 T rdmacore50_0_ibv_cmd_query_device_any\n+00000000000004d0 T rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_read_ibdev_sysfs_file\n+ U strcmp\n \n-cl_map.c.o:\n-00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n-0000000000000db0 T rdmacore50_0_cl_qmap_delta\n-0000000000000060 T rdmacore50_0_cl_qmap_get\n-00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n-0000000000000000 T rdmacore50_0_cl_qmap_init\n-0000000000000140 T rdmacore50_0_cl_qmap_insert\n-00000000000008f0 T rdmacore50_0_cl_qmap_merge\n-00000000000008b0 T rdmacore50_0_cl_qmap_remove\n-0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n+mmio.c.o:\n \n rdma_nl.c.o:\n U __stack_chk_fail\n U nl_connect\n U nl_recvmsgs_default\n U nl_send_auto\n U nl_send_simple\n@@ -1091,14 +1056,44 @@\n 0000000000000060 T rdmacore50_0_rdmanl_get_copy_on_fork\n 0000000000000130 T rdmacore50_0_rdmanl_get_devices\n 0000000000000000 D rdmacore50_0_rdmanl_policy\n 0000000000000010 T rdmacore50_0_rdmanl_socket_alloc\n 0000000000000000 t rdmanl_saw_err_cb\n U strlen\n \n+bitmap.c.o:\n+ U memset\n+0000000000000160 T rdmacore50_0_bitmap_fill_region\n+0000000000000000 T rdmacore50_0_bitmap_find_first_bit\n+0000000000000220 T rdmacore50_0_bitmap_find_free_region\n+0000000000000090 T rdmacore50_0_bitmap_zero_region\n+\n+util.c.o:\n+ U fcntl\n+ U getenv\n+ U getrandom\n+ U rand_r\n+00000000000000d0 T rdmacore50_0_check_env\n+0000000000000050 T rdmacore50_0_get_random\n+0000000000000000 T rdmacore50_0_set_fd_nonblock\n+0000000000000110 T rdmacore50_0_xorshift32\n+0000000000000000 b seed.0\n+ U time\n+\n+cl_map.c.o:\n+00000000000000f0 T rdmacore50_0_cl_qmap_apply_func\n+0000000000000db0 T rdmacore50_0_cl_qmap_delta\n+0000000000000060 T rdmacore50_0_cl_qmap_get\n+00000000000000a0 T rdmacore50_0_cl_qmap_get_next\n+0000000000000000 T rdmacore50_0_cl_qmap_init\n+0000000000000140 T rdmacore50_0_cl_qmap_insert\n+00000000000008f0 T rdmacore50_0_cl_qmap_merge\n+00000000000008b0 T rdmacore50_0_cl_qmap_remove\n+0000000000000430 T rdmacore50_0_cl_qmap_remove_item\n+\n node_name_map.c.o:\n 0000000000000000 r .LC0\n 000000000000001b r .LC1\n 000000000000001d r .LC2\n 0000000000000000 r .LC3\n 0000000000000020 r .LC4\n 0000000000000030 r .LC5\n@@ -1124,32 +1119,37 @@\n U strchr\n U strdup\n U strerror\n U strncpy\n U strtok\n U strtoull\n \n-mmio.c.o:\n+open_cdev.c.o:\n+0000000000000000 r .LC0\n+0000000000000010 r .LC1\n+000000000000001b r .LC2\n+ U __asprintf_chk\n+ U __stack_chk_fail\n+ U close\n+ U free\n+ U fstat\n+ U inotify_add_watch\n+ U inotify_init1\n+ U open\n+0000000000000000 t open_cdev_robust.isra.0\n+ U poll\n+0000000000000380 T rdmacore50_0_open_cdev\n+ U read\n+ U timerfd_create\n+ U timerfd_settime\n \n interval_set.c.o:\n U __errno_location\n U calloc\n U free\n U pthread_mutex_init\n U pthread_mutex_lock\n U pthread_mutex_unlock\n 0000000000000290 T rdmacore50_0_iset_alloc_range\n 0000000000000000 T rdmacore50_0_iset_create\n 0000000000000050 T rdmacore50_0_iset_destroy\n 0000000000000090 T rdmacore50_0_iset_insert_range\n-\n-util.c.o:\n- U fcntl\n- U getenv\n- U getrandom\n- U rand_r\n-00000000000000d0 T rdmacore50_0_check_env\n-0000000000000050 T rdmacore50_0_get_random\n-0000000000000000 T rdmacore50_0_set_fd_nonblock\n-0000000000000110 T rdmacore50_0_xorshift32\n-0000000000000000 b seed.0\n- U time\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,42 +1,42 @@\n ---------- 0 0 0 6648 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n-?rw-r--r-- 0 0 0 2944 1970-01-01 00:00:00.000000 cmd_counters.c.o\n+?rw-r--r-- 0 0 0 1784 1970-01-01 00:00:00.000000 cmd_flow.c.o\n+?rw-r--r-- 0 0 0 1288 1970-01-01 00:00:00.000000 static_driver.c.o\n+?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_ah.c.o\n+?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_pd.c.o\n ?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_mw.c.o\n-?rw-r--r-- 0 0 0 11824 1970-01-01 00:00:00.000000 device.c.o\n-?rw-r--r-- 0 0 0 4240 1970-01-01 00:00:00.000000 cmd_wq.c.o\n+?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 sysfs.c.o\n+?rw-r--r-- 0 0 0 18584 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r-- 0 0 0 8072 1970-01-01 00:00:00.000000 cmd_qp.c.o\n-?rw-r--r-- 0 0 0 14936 1970-01-01 00:00:00.000000 neigh.c.o\n-?rw-r--r-- 0 0 0 12760 1970-01-01 00:00:00.000000 cmd_device.c.o\n-?rw-r--r-- 0 0 0 1960 1970-01-01 00:00:00.000000 marshall.c.o\n-?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_ah.c.o\n-?rw-r--r-- 0 0 0 18624 1970-01-01 00:00:00.000000 cmd.c.o\n-?rw-r--r-- 0 0 0 6152 1970-01-01 00:00:00.000000 enum_strs.c.o\n ?rw-r--r-- 0 0 0 3640 1970-01-01 00:00:00.000000 cmd_mr.c.o\n-?rw-r--r-- 0 0 0 1792 1970-01-01 00:00:00.000000 cmd_rwq_ind.c.o\n-?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 sysfs.c.o\n-?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_xrcd.c.o\n-?rw-r--r-- 0 0 0 2624 1970-01-01 00:00:00.000000 all_providers.c.o\n-?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 cmd_flow_action.c.o\n+?rw-r--r-- 0 0 0 1960 1970-01-01 00:00:00.000000 marshall.c.o\n ?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 cmd_dm.c.o\n+?rw-r--r-- 0 0 0 2944 1970-01-01 00:00:00.000000 cmd_counters.c.o\n ?rw-r--r-- 0 0 0 2648 1970-01-01 00:00:00.000000 cmd_ioctl.c.o\n-?rw-r--r-- 0 0 0 1288 1970-01-01 00:00:00.000000 static_driver.c.o\n-?rw-r--r-- 0 0 0 6040 1970-01-01 00:00:00.000000 cmd_srq.c.o\n ?rw-r--r-- 0 0 0 9984 1970-01-01 00:00:00.000000 memory.c.o\n+?rw-r--r-- 0 0 0 2624 1970-01-01 00:00:00.000000 all_providers.c.o\n+?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_xrcd.c.o\n+?rw-r--r-- 0 0 0 6040 1970-01-01 00:00:00.000000 cmd_srq.c.o\n+?rw-r--r-- 0 0 0 14048 1970-01-01 00:00:00.000000 dummy_ops.c.o\n+?rw-r--r-- 0 0 0 14760 1970-01-01 00:00:00.000000 init.c.o\n+?rw-r--r-- 0 0 0 14936 1970-01-01 00:00:00.000000 neigh.c.o\n ?rw-r--r-- 0 0 0 5144 1970-01-01 00:00:00.000000 cmd_cq.c.o\n+?rw-r--r-- 0 0 0 11824 1970-01-01 00:00:00.000000 device.c.o\n+?rw-r--r-- 0 0 0 1792 1970-01-01 00:00:00.000000 cmd_rwq_ind.c.o\n ?rw-r--r-- 0 0 0 5120 1970-01-01 00:00:00.000000 cmd_fallback.c.o\n+?rw-r--r-- 0 0 0 6016 1970-01-01 00:00:00.000000 ibdev_nl.c.o\n+?rw-r--r-- 0 0 0 6152 1970-01-01 00:00:00.000000 enum_strs.c.o\n ?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 dynamic_driver.c.o\n-?rw-r--r-- 0 0 0 14048 1970-01-01 00:00:00.000000 dummy_ops.c.o\n-?rw-r--r-- 0 0 0 14760 1970-01-01 00:00:00.000000 init.c.o\n+?rw-r--r-- 0 0 0 3824 1970-01-01 00:00:00.000000 cmd_flow_action.c.o\n+?rw-r--r-- 0 0 0 4240 1970-01-01 00:00:00.000000 cmd_wq.c.o\n ?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 compat-1_0.c.o\n-?rw-r--r-- 0 0 0 1784 1970-01-01 00:00:00.000000 cmd_flow.c.o\n-?rw-r--r-- 0 0 0 6016 1970-01-01 00:00:00.000000 ibdev_nl.c.o\n-?rw-r--r-- 0 0 0 1768 1970-01-01 00:00:00.000000 cmd_pd.c.o\n-?rw-r--r-- 0 0 0 18584 1970-01-01 00:00:00.000000 verbs.c.o\n-?rw-r--r-- 0 0 0 3952 1970-01-01 00:00:00.000000 open_cdev.c.o\n+?rw-r--r-- 0 0 0 18624 1970-01-01 00:00:00.000000 cmd.c.o\n+?rw-r--r-- 0 0 0 12760 1970-01-01 00:00:00.000000 cmd_device.c.o\n+?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 mmio.c.o\n+?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n ?rw-r--r-- 0 0 0 2496 1970-01-01 00:00:00.000000 bitmap.c.o\n+?rw-r--r-- 0 0 0 2264 1970-01-01 00:00:00.000000 util.c.o\n ?rw-r--r-- 0 0 0 6176 1970-01-01 00:00:00.000000 cl_map.c.o\n-?rw-r--r-- 0 0 0 4456 1970-01-01 00:00:00.000000 rdma_nl.c.o\n ?rw-r--r-- 0 0 0 5456 1970-01-01 00:00:00.000000 node_name_map.c.o\n-?rw-r--r-- 0 0 0 608 1970-01-01 00:00:00.000000 mmio.c.o\n+?rw-r--r-- 0 0 0 3952 1970-01-01 00:00:00.000000 open_cdev.c.o\n ?rw-r--r-- 0 0 0 3360 1970-01-01 00:00:00.000000 interval_set.c.o\n-?rw-r--r-- 0 0 0 2264 1970-01-01 00:00:00.000000 util.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libipathverbs-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libipathverbs-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,10 +1,9 @@\n \n Archive index:\n-verbs_provider_ipathverbs in ipathverbs.c.o\n rdmacore50_0_ipath_query_device in verbs.c.o\n rdmacore50_0_ipath_query_port in verbs.c.o\n rdmacore50_0_ipath_alloc_pd in verbs.c.o\n rdmacore50_0_ipath_free_pd in verbs.c.o\n rdmacore50_0_ipath_reg_mr in verbs.c.o\n rdmacore50_0_ipath_dereg_mr in verbs.c.o\n rdmacore50_0_ipath_create_cq in verbs.c.o\n@@ -28,71 +27,15 @@\n rdmacore50_0_ipath_modify_srq_v1 in verbs.c.o\n rdmacore50_0_ipath_query_srq in verbs.c.o\n rdmacore50_0_ipath_destroy_srq in verbs.c.o\n rdmacore50_0_ipath_destroy_srq_v1 in verbs.c.o\n rdmacore50_0_ipath_post_srq_recv in verbs.c.o\n rdmacore50_0_ipath_create_ah in verbs.c.o\n rdmacore50_0_ipath_destroy_ah in verbs.c.o\n-\n-ipathverbs.c.o:\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n-0000000000000000 r hca_table\n-0000000000000060 t ipath_alloc_context\n-0000000000000260 d ipath_ctx_common_ops\n-0000000000000000 d ipath_ctx_v1_ops\n-0000000000000000 d ipath_dev_ops\n-0000000000000010 t ipath_device_alloc\n-0000000000000040 t ipath_free_context\n-0000000000000000 t ipath_uninit_device\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_ibv_cmd_poll_cq\n- U rdmacore50_0_ibv_cmd_post_recv\n- U rdmacore50_0_ibv_cmd_post_srq_recv\n- U rdmacore50_0_ibv_cmd_req_notify_cq\n- U rdmacore50_0_ipath_alloc_pd\n- U rdmacore50_0_ipath_create_ah\n- U rdmacore50_0_ipath_create_cq\n- U rdmacore50_0_ipath_create_cq_v1\n- U rdmacore50_0_ipath_create_qp\n- U rdmacore50_0_ipath_create_qp_v1\n- U rdmacore50_0_ipath_create_srq\n- U rdmacore50_0_ipath_create_srq_v1\n- U rdmacore50_0_ipath_dereg_mr\n- U rdmacore50_0_ipath_destroy_ah\n- U rdmacore50_0_ipath_destroy_cq\n- U rdmacore50_0_ipath_destroy_cq_v1\n- U rdmacore50_0_ipath_destroy_qp\n- U rdmacore50_0_ipath_destroy_qp_v1\n- U rdmacore50_0_ipath_destroy_srq\n- U rdmacore50_0_ipath_destroy_srq_v1\n- U rdmacore50_0_ipath_free_pd\n- U rdmacore50_0_ipath_modify_qp\n- U rdmacore50_0_ipath_modify_srq\n- U rdmacore50_0_ipath_modify_srq_v1\n- U rdmacore50_0_ipath_poll_cq\n- U rdmacore50_0_ipath_post_recv\n- U rdmacore50_0_ipath_post_send\n- U rdmacore50_0_ipath_post_srq_recv\n- U rdmacore50_0_ipath_query_device\n- U rdmacore50_0_ipath_query_port\n- U rdmacore50_0_ipath_query_qp\n- U rdmacore50_0_ipath_query_srq\n- U rdmacore50_0_ipath_reg_mr\n- U rdmacore50_0_ipath_resize_cq\n- U rdmacore50_0_ipath_resize_cq_v1\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_ipathverbs\n+verbs_provider_ipathverbs in ipathverbs.c.o\n \n verbs.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n U __snprintf_chk\n U __stack_chk_fail\n U free\n@@ -150,7 +93,64 @@\n 00000000000000e0 T rdmacore50_0_ipath_query_device\n 0000000000000180 T rdmacore50_0_ipath_query_port\n 0000000000000990 T rdmacore50_0_ipath_query_qp\n 0000000000000f60 T rdmacore50_0_ipath_query_srq\n 0000000000000290 T rdmacore50_0_ipath_reg_mr\n 0000000000000510 T rdmacore50_0_ipath_resize_cq\n 0000000000000610 T rdmacore50_0_ipath_resize_cq_v1\n+\n+ipathverbs.c.o:\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+0000000000000000 r hca_table\n+0000000000000060 t ipath_alloc_context\n+0000000000000260 d ipath_ctx_common_ops\n+0000000000000000 d ipath_ctx_v1_ops\n+0000000000000000 d ipath_dev_ops\n+0000000000000010 t ipath_device_alloc\n+0000000000000040 t ipath_free_context\n+0000000000000000 t ipath_uninit_device\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_attach_mcast\n+ U rdmacore50_0_ibv_cmd_detach_mcast\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_ibv_cmd_poll_cq\n+ U rdmacore50_0_ibv_cmd_post_recv\n+ U rdmacore50_0_ibv_cmd_post_srq_recv\n+ U rdmacore50_0_ibv_cmd_req_notify_cq\n+ U rdmacore50_0_ipath_alloc_pd\n+ U rdmacore50_0_ipath_create_ah\n+ U rdmacore50_0_ipath_create_cq\n+ U rdmacore50_0_ipath_create_cq_v1\n+ U rdmacore50_0_ipath_create_qp\n+ U rdmacore50_0_ipath_create_qp_v1\n+ U rdmacore50_0_ipath_create_srq\n+ U rdmacore50_0_ipath_create_srq_v1\n+ U rdmacore50_0_ipath_dereg_mr\n+ U rdmacore50_0_ipath_destroy_ah\n+ U rdmacore50_0_ipath_destroy_cq\n+ U rdmacore50_0_ipath_destroy_cq_v1\n+ U rdmacore50_0_ipath_destroy_qp\n+ U rdmacore50_0_ipath_destroy_qp_v1\n+ U rdmacore50_0_ipath_destroy_srq\n+ U rdmacore50_0_ipath_destroy_srq_v1\n+ U rdmacore50_0_ipath_free_pd\n+ U rdmacore50_0_ipath_modify_qp\n+ U rdmacore50_0_ipath_modify_srq\n+ U rdmacore50_0_ipath_modify_srq_v1\n+ U rdmacore50_0_ipath_poll_cq\n+ U rdmacore50_0_ipath_post_recv\n+ U rdmacore50_0_ipath_post_send\n+ U rdmacore50_0_ipath_post_srq_recv\n+ U rdmacore50_0_ipath_query_device\n+ U rdmacore50_0_ipath_query_port\n+ U rdmacore50_0_ipath_query_qp\n+ U rdmacore50_0_ipath_query_srq\n+ U rdmacore50_0_ipath_reg_mr\n+ U rdmacore50_0_ipath_resize_cq\n+ U rdmacore50_0_ipath_resize_cq_v1\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_ipathverbs\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n ---------- 0 0 0 1092 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 8264 1970-01-01 00:00:00.000000 ipathverbs.c.o\n ?rw-r--r-- 0 0 0 13720 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 8264 1970-01-01 00:00:00.000000 ipathverbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libirdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libirdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,38 +1,9 @@\n \n Archive index:\n-verbs_provider_irdma in umain.c.o\n-rdmacore50_0_irdma_clr_wqes in uk.c.o\n-rdmacore50_0_irdma_uk_qp_post_wr in uk.c.o\n-rdmacore50_0_irdma_qp_push_wqe in uk.c.o\n-rdmacore50_0_irdma_qp_get_next_send_wqe in uk.c.o\n-rdmacore50_0_irdma_qp_get_next_recv_wqe in uk.c.o\n-rdmacore50_0_irdma_uk_rdma_write in uk.c.o\n-rdmacore50_0_irdma_uk_rdma_read in uk.c.o\n-rdmacore50_0_irdma_uk_send in uk.c.o\n-rdmacore50_0_irdma_uk_inline_rdma_write in uk.c.o\n-rdmacore50_0_irdma_uk_inline_send in uk.c.o\n-rdmacore50_0_irdma_uk_stag_local_invalidate in uk.c.o\n-rdmacore50_0_irdma_uk_mw_bind in uk.c.o\n-rdmacore50_0_irdma_uk_post_receive in uk.c.o\n-rdmacore50_0_irdma_uk_cq_resize in uk.c.o\n-rdmacore50_0_irdma_uk_cq_set_resized_cnt in uk.c.o\n-rdmacore50_0_irdma_uk_cq_request_notification in uk.c.o\n-rdmacore50_0_irdma_uk_cq_poll_cmpl in uk.c.o\n-rdmacore50_0_irdma_get_wqe_shift in uk.c.o\n-rdmacore50_0_irdma_get_sqdepth in uk.c.o\n-rdmacore50_0_irdma_get_rqdepth in uk.c.o\n-rdmacore50_0_irdma_uk_calc_depth_shift_sq in uk.c.o\n-rdmacore50_0_irdma_uk_calc_depth_shift_rq in uk.c.o\n-rdmacore50_0_irdma_uk_qp_init in uk.c.o\n-rdmacore50_0_irdma_uk_cq_init in uk.c.o\n-rdmacore50_0_irdma_uk_clean_cq in uk.c.o\n-rdmacore50_0_irdma_nop in uk.c.o\n-rdmacore50_0_irdma_fragcnt_to_quanta_sq in uk.c.o\n-rdmacore50_0_irdma_fragcnt_to_wqesize_rq in uk.c.o\n rdmacore50_0_irdma_uquery_device_ex in uverbs.c.o\n rdmacore50_0_irdma_uquery_port in uverbs.c.o\n rdmacore50_0_irdma_ualloc_pd in uverbs.c.o\n rdmacore50_0_irdma_ufree_pd in uverbs.c.o\n rdmacore50_0_irdma_ureg_mr in uverbs.c.o\n rdmacore50_0_irdma_ureg_mr_dmabuf in uverbs.c.o\n rdmacore50_0_irdma_urereg_mr in uverbs.c.o\n@@ -56,108 +27,43 @@\n rdmacore50_0_irdma_ubind_mw in uverbs.c.o\n rdmacore50_0_irdma_upost_recv in uverbs.c.o\n rdmacore50_0_irdma_ucreate_ah in uverbs.c.o\n rdmacore50_0_irdma_udestroy_ah in uverbs.c.o\n rdmacore50_0_irdma_uattach_mcast in uverbs.c.o\n rdmacore50_0_irdma_udetach_mcast in uverbs.c.o\n rdmacore50_0_irdma_uresize_cq in uverbs.c.o\n-\n-umain.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n-0000000000000000 r hca_table\n-0000000000000010 t irdma_device_alloc\n-0000000000000030 t irdma_ualloc_context\n-0000000000000000 d irdma_uctx_ops\n-0000000000000000 d irdma_udev_ops\n-0000000000000270 t irdma_ufree_context\n-0000000000000000 t irdma_uninit_device\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_irdma_cq_event\n- U rdmacore50_0_irdma_mmap\n- U rdmacore50_0_irdma_munmap\n- U rdmacore50_0_irdma_ualloc_mw\n- U rdmacore50_0_irdma_ualloc_pd\n- U rdmacore50_0_irdma_uarm_cq\n- U rdmacore50_0_irdma_uattach_mcast\n- U rdmacore50_0_irdma_ubind_mw\n- U rdmacore50_0_irdma_ucreate_ah\n- U rdmacore50_0_irdma_ucreate_cq\n- U rdmacore50_0_irdma_ucreate_cq_ex\n- U rdmacore50_0_irdma_ucreate_qp\n- U rdmacore50_0_irdma_udealloc_mw\n- U rdmacore50_0_irdma_udereg_mr\n- U rdmacore50_0_irdma_udestroy_ah\n- U rdmacore50_0_irdma_udestroy_cq\n- U rdmacore50_0_irdma_udestroy_qp\n- U rdmacore50_0_irdma_udetach_mcast\n- U rdmacore50_0_irdma_ufree_pd\n- U rdmacore50_0_irdma_umodify_qp\n- U rdmacore50_0_irdma_upoll_cq\n- U rdmacore50_0_irdma_upost_recv\n- U rdmacore50_0_irdma_upost_send\n- U rdmacore50_0_irdma_uquery_device_ex\n- U rdmacore50_0_irdma_uquery_port\n- U rdmacore50_0_irdma_uquery_qp\n- U rdmacore50_0_irdma_ureg_mr\n- U rdmacore50_0_irdma_ureg_mr_dmabuf\n- U rdmacore50_0_irdma_urereg_mr\n- U rdmacore50_0_irdma_uresize_cq\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000000 D verbs_provider_irdma\n-\n-uk.c.o:\n- U __stack_chk_fail\n-0000000000000110 t irdma_copy_inline_data\n-0000000000000070 t irdma_copy_inline_data_gen_1\n-0000000000000014 t irdma_fragcnt_to_quanta_sq.cold\n-00000000000002b0 t irdma_inline_data_size_to_quanta\n-0000000000000030 t irdma_inline_data_size_to_quanta_gen_1\n-0000000000000210 t irdma_set_fragment\n-0000000000000270 t irdma_set_fragment_gen_1\n-0000000000000040 t irdma_set_mw_bind_wqe\n-0000000000000000 t irdma_set_mw_bind_wqe_gen_1\n-0000000000000000 t irdma_uk_rdma_write.cold\n-000000000000000a t irdma_uk_send.cold\n- U memcpy\n-0000000000000310 T rdmacore50_0_irdma_clr_wqes\n-0000000000003420 T rdmacore50_0_irdma_fragcnt_to_quanta_sq\n-00000000000034c0 T rdmacore50_0_irdma_fragcnt_to_wqesize_rq\n-0000000000002cc0 T rdmacore50_0_irdma_get_rqdepth\n-0000000000002c60 T rdmacore50_0_irdma_get_sqdepth\n-0000000000002be0 T rdmacore50_0_irdma_get_wqe_shift\n-0000000000003280 T rdmacore50_0_irdma_nop\n-00000000000006b0 T rdmacore50_0_irdma_qp_get_next_recv_wqe\n-0000000000000430 T rdmacore50_0_irdma_qp_get_next_send_wqe\n-00000000000003a0 T rdmacore50_0_irdma_qp_push_wqe\n-0000000000002e30 T rdmacore50_0_irdma_uk_calc_depth_shift_rq\n-0000000000002d20 T rdmacore50_0_irdma_uk_calc_depth_shift_sq\n-00000000000031a0 T rdmacore50_0_irdma_uk_clean_cq\n-0000000000003140 T rdmacore50_0_irdma_uk_cq_init\n-00000000000025c0 T rdmacore50_0_irdma_uk_cq_poll_cmpl\n-0000000000002570 T rdmacore50_0_irdma_uk_cq_request_notification\n-0000000000002520 T rdmacore50_0_irdma_uk_cq_resize\n-0000000000002540 T rdmacore50_0_irdma_uk_cq_set_resized_cnt\n-0000000000001780 T rdmacore50_0_irdma_uk_inline_rdma_write\n-0000000000001b20 T rdmacore50_0_irdma_uk_inline_send\n-0000000000002130 T rdmacore50_0_irdma_uk_mw_bind\n-0000000000002370 T rdmacore50_0_irdma_uk_post_receive\n-0000000000002f30 T rdmacore50_0_irdma_uk_qp_init\n-0000000000000380 T rdmacore50_0_irdma_uk_qp_post_wr\n-0000000000000ca0 T rdmacore50_0_irdma_uk_rdma_read\n-0000000000000730 T rdmacore50_0_irdma_uk_rdma_write\n-00000000000011a0 T rdmacore50_0_irdma_uk_send\n-0000000000001f00 T rdmacore50_0_irdma_uk_stag_local_invalidate\n+verbs_provider_irdma in umain.c.o\n+rdmacore50_0_irdma_clr_wqes in uk.c.o\n+rdmacore50_0_irdma_uk_qp_post_wr in uk.c.o\n+rdmacore50_0_irdma_qp_push_wqe in uk.c.o\n+rdmacore50_0_irdma_qp_get_next_send_wqe in uk.c.o\n+rdmacore50_0_irdma_qp_get_next_recv_wqe in uk.c.o\n+rdmacore50_0_irdma_uk_rdma_write in uk.c.o\n+rdmacore50_0_irdma_uk_rdma_read in uk.c.o\n+rdmacore50_0_irdma_uk_send in uk.c.o\n+rdmacore50_0_irdma_uk_inline_rdma_write in uk.c.o\n+rdmacore50_0_irdma_uk_inline_send in uk.c.o\n+rdmacore50_0_irdma_uk_stag_local_invalidate in uk.c.o\n+rdmacore50_0_irdma_uk_mw_bind in uk.c.o\n+rdmacore50_0_irdma_uk_post_receive in uk.c.o\n+rdmacore50_0_irdma_uk_cq_resize in uk.c.o\n+rdmacore50_0_irdma_uk_cq_set_resized_cnt in uk.c.o\n+rdmacore50_0_irdma_uk_cq_request_notification in uk.c.o\n+rdmacore50_0_irdma_uk_cq_poll_cmpl in uk.c.o\n+rdmacore50_0_irdma_get_wqe_shift in uk.c.o\n+rdmacore50_0_irdma_get_sqdepth in uk.c.o\n+rdmacore50_0_irdma_get_rqdepth in uk.c.o\n+rdmacore50_0_irdma_uk_calc_depth_shift_sq in uk.c.o\n+rdmacore50_0_irdma_uk_calc_depth_shift_rq in uk.c.o\n+rdmacore50_0_irdma_uk_qp_init in uk.c.o\n+rdmacore50_0_irdma_uk_cq_init in uk.c.o\n+rdmacore50_0_irdma_uk_clean_cq in uk.c.o\n+rdmacore50_0_irdma_nop in uk.c.o\n+rdmacore50_0_irdma_fragcnt_to_quanta_sq in uk.c.o\n+rdmacore50_0_irdma_fragcnt_to_wqesize_rq in uk.c.o\n \n uverbs.c.o:\n 0000000000000000 r .LC0\n 00000000000000e0 r CSWTCH.37\n U __errno_location\n 0000000000000500 t __irdma_upoll_cq.constprop.0\n U __snprintf_chk\n@@ -261,7 +167,101 @@\n 0000000000000950 T rdmacore50_0_irdma_uquery_port\n 0000000000002500 T rdmacore50_0_irdma_uquery_qp\n 0000000000000a80 T rdmacore50_0_irdma_ureg_mr\n 0000000000000b50 T rdmacore50_0_irdma_ureg_mr_dmabuf\n 0000000000000bf0 T rdmacore50_0_irdma_urereg_mr\n 00000000000030b0 T rdmacore50_0_irdma_uresize_cq\n 0000000000001710 t ucreate_cq\n+\n+umain.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+0000000000000000 r hca_table\n+0000000000000010 t irdma_device_alloc\n+0000000000000030 t irdma_ualloc_context\n+0000000000000000 d irdma_uctx_ops\n+0000000000000000 d irdma_udev_ops\n+0000000000000270 t irdma_ufree_context\n+0000000000000000 t irdma_uninit_device\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_irdma_cq_event\n+ U rdmacore50_0_irdma_mmap\n+ U rdmacore50_0_irdma_munmap\n+ U rdmacore50_0_irdma_ualloc_mw\n+ U rdmacore50_0_irdma_ualloc_pd\n+ U rdmacore50_0_irdma_uarm_cq\n+ U rdmacore50_0_irdma_uattach_mcast\n+ U rdmacore50_0_irdma_ubind_mw\n+ U rdmacore50_0_irdma_ucreate_ah\n+ U rdmacore50_0_irdma_ucreate_cq\n+ U rdmacore50_0_irdma_ucreate_cq_ex\n+ U rdmacore50_0_irdma_ucreate_qp\n+ U rdmacore50_0_irdma_udealloc_mw\n+ U rdmacore50_0_irdma_udereg_mr\n+ U rdmacore50_0_irdma_udestroy_ah\n+ U rdmacore50_0_irdma_udestroy_cq\n+ U rdmacore50_0_irdma_udestroy_qp\n+ U rdmacore50_0_irdma_udetach_mcast\n+ U rdmacore50_0_irdma_ufree_pd\n+ U rdmacore50_0_irdma_umodify_qp\n+ U rdmacore50_0_irdma_upoll_cq\n+ U rdmacore50_0_irdma_upost_recv\n+ U rdmacore50_0_irdma_upost_send\n+ U rdmacore50_0_irdma_uquery_device_ex\n+ U rdmacore50_0_irdma_uquery_port\n+ U rdmacore50_0_irdma_uquery_qp\n+ U rdmacore50_0_irdma_ureg_mr\n+ U rdmacore50_0_irdma_ureg_mr_dmabuf\n+ U rdmacore50_0_irdma_urereg_mr\n+ U rdmacore50_0_irdma_uresize_cq\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000000 D verbs_provider_irdma\n+\n+uk.c.o:\n+ U __stack_chk_fail\n+0000000000000110 t irdma_copy_inline_data\n+0000000000000070 t irdma_copy_inline_data_gen_1\n+0000000000000014 t irdma_fragcnt_to_quanta_sq.cold\n+00000000000002b0 t irdma_inline_data_size_to_quanta\n+0000000000000030 t irdma_inline_data_size_to_quanta_gen_1\n+0000000000000210 t irdma_set_fragment\n+0000000000000270 t irdma_set_fragment_gen_1\n+0000000000000040 t irdma_set_mw_bind_wqe\n+0000000000000000 t irdma_set_mw_bind_wqe_gen_1\n+0000000000000000 t irdma_uk_rdma_write.cold\n+000000000000000a t irdma_uk_send.cold\n+ U memcpy\n+0000000000000310 T rdmacore50_0_irdma_clr_wqes\n+0000000000003420 T rdmacore50_0_irdma_fragcnt_to_quanta_sq\n+00000000000034c0 T rdmacore50_0_irdma_fragcnt_to_wqesize_rq\n+0000000000002cc0 T rdmacore50_0_irdma_get_rqdepth\n+0000000000002c60 T rdmacore50_0_irdma_get_sqdepth\n+0000000000002be0 T rdmacore50_0_irdma_get_wqe_shift\n+0000000000003280 T rdmacore50_0_irdma_nop\n+00000000000006b0 T rdmacore50_0_irdma_qp_get_next_recv_wqe\n+0000000000000430 T rdmacore50_0_irdma_qp_get_next_send_wqe\n+00000000000003a0 T rdmacore50_0_irdma_qp_push_wqe\n+0000000000002e30 T rdmacore50_0_irdma_uk_calc_depth_shift_rq\n+0000000000002d20 T rdmacore50_0_irdma_uk_calc_depth_shift_sq\n+00000000000031a0 T rdmacore50_0_irdma_uk_clean_cq\n+0000000000003140 T rdmacore50_0_irdma_uk_cq_init\n+00000000000025c0 T rdmacore50_0_irdma_uk_cq_poll_cmpl\n+0000000000002570 T rdmacore50_0_irdma_uk_cq_request_notification\n+0000000000002520 T rdmacore50_0_irdma_uk_cq_resize\n+0000000000002540 T rdmacore50_0_irdma_uk_cq_set_resized_cnt\n+0000000000001780 T rdmacore50_0_irdma_uk_inline_rdma_write\n+0000000000001b20 T rdmacore50_0_irdma_uk_inline_send\n+0000000000002130 T rdmacore50_0_irdma_uk_mw_bind\n+0000000000002370 T rdmacore50_0_irdma_uk_post_receive\n+0000000000002f30 T rdmacore50_0_irdma_uk_qp_init\n+0000000000000380 T rdmacore50_0_irdma_uk_qp_post_wr\n+0000000000000ca0 T rdmacore50_0_irdma_uk_rdma_read\n+0000000000000730 T rdmacore50_0_irdma_uk_rdma_write\n+00000000000011a0 T rdmacore50_0_irdma_uk_send\n+0000000000001f00 T rdmacore50_0_irdma_uk_stag_local_invalidate\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 2180 1970-01-01 00:00:00.000000 /\n+?rw-r--r-- 0 0 0 31024 1970-01-01 00:00:00.000000 uverbs.c.o\n ?rw-r--r-- 0 0 0 8480 1970-01-01 00:00:00.000000 umain.c.o\n ?rw-r--r-- 0 0 0 22264 1970-01-01 00:00:00.000000 uk.c.o\n-?rw-r--r-- 0 0 0 31024 1970-01-01 00:00:00.000000 uverbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmana.a", "source2": "./usr/lib/x86_64-linux-gnu/libmana.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,32 +1,97 @@\n \n Archive index:\n+rdmacore50_0_mana_create_qp in qp.c.o\n+rdmacore50_0_mana_modify_qp in qp.c.o\n+rdmacore50_0_mana_destroy_qp in qp.c.o\n+rdmacore50_0_mana_create_qp_ex in qp.c.o\n+rdmacore50_0_mana_modify_wq in wq.c.o\n+rdmacore50_0_mana_create_wq in wq.c.o\n+rdmacore50_0_mana_destroy_wq in wq.c.o\n+rdmacore50_0_mana_create_rwq_ind_table in wq.c.o\n+rdmacore50_0_mana_destroy_rwq_ind_table in wq.c.o\n rdmacore50_0_mana_query_device_ex in mana.c.o\n rdmacore50_0_mana_query_port in mana.c.o\n rdmacore50_0_mana_alloc_parent_domain in mana.c.o\n rdmacore50_0_mana_alloc_pd in mana.c.o\n rdmacore50_0_mana_dealloc_pd in mana.c.o\n rdmacore50_0_mana_reg_mr in mana.c.o\n rdmacore50_0_mana_create_cq in mana.c.o\n rdmacore50_0_mana_destroy_cq in mana.c.o\n rdmacore50_0_mana_dereg_mr in mana.c.o\n rdmacore50_0_to_mctx in mana.c.o\n verbs_provider_mana in mana.c.o\n-rdmacore50_0_mana_modify_wq in wq.c.o\n-rdmacore50_0_mana_create_wq in wq.c.o\n-rdmacore50_0_mana_destroy_wq in wq.c.o\n-rdmacore50_0_mana_create_rwq_ind_table in wq.c.o\n-rdmacore50_0_mana_destroy_rwq_ind_table in wq.c.o\n-rdmacore50_0_mana_create_qp in qp.c.o\n-rdmacore50_0_mana_modify_qp in qp.c.o\n-rdmacore50_0_mana_destroy_qp in qp.c.o\n-rdmacore50_0_mana_create_qp_ex in qp.c.o\n manadv_set_context_attr in manadv.c.o\n manadv_init_obj in manadv.c.o\n \n+qp.c.o:\n+0000000000000000 r .LC0\n+0000000000000038 r .LC1\n+000000000000001d r .LC10\n+0000000000000060 r .LC2\n+0000000000000080 r .LC4\n+00000000000000b8 r .LC5\n+0000000000000000 r .LC6\n+00000000000000f0 r .LC7\n+0000000000000118 r .LC9\n+ U __errno_location\n+0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n+0000000000000040 r __func__.2\n+0000000000000050 r __func__.3\n+0000000000000068 r __func__.4\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+0000000000000014 t mana_create_qp.cold\n+0000000000000046 t mana_create_qp_ex.cold\n+0000000000000000 t mana_create_qp_ex_raw\n+0000000000000000 t mana_create_qp_ex_raw.cold\n+0000000000000032 t mana_destroy_qp.cold\n+ U rdmacore50_0___verbs_log\n+ U rdmacore50_0_ibv_cmd_create_qp\n+ U rdmacore50_0_ibv_cmd_create_qp_ex2\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+0000000000000260 T rdmacore50_0_mana_create_qp\n+0000000000000700 T rdmacore50_0_mana_create_qp_ex\n+00000000000005e0 T rdmacore50_0_mana_destroy_qp\n+00000000000005d0 T rdmacore50_0_mana_modify_qp\n+ U rdmacore50_0_to_mctx\n+\n+wq.c.o:\n+0000000000000000 r .LC0\n+0000000000000038 r .LC1\n+0000000000000058 r .LC3\n+0000000000000088 r .LC4\n+00000000000000b0 r .LC6\n+00000000000000e0 r .LC8\n+ U __errno_location\n+0000000000000000 r __func__.0\n+0000000000000020 r __func__.1\n+0000000000000040 r __func__.2\n+0000000000000050 r __func__.3\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+0000000000000028 t mana_create_rwq_ind_table.cold\n+0000000000000000 t mana_create_wq.cold\n+0000000000000032 t mana_destroy_rwq_ind_table.cold\n+0000000000000014 t mana_destroy_wq.cold\n+ U rdmacore50_0___verbs_log\n+ U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n+ U rdmacore50_0_ibv_cmd_create_wq\n+ U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n+ U rdmacore50_0_ibv_cmd_destroy_wq\n+00000000000003c0 T rdmacore50_0_mana_create_rwq_ind_table\n+0000000000000010 T rdmacore50_0_mana_create_wq\n+0000000000000570 T rdmacore50_0_mana_destroy_rwq_ind_table\n+0000000000000290 T rdmacore50_0_mana_destroy_wq\n+0000000000000000 T rdmacore50_0_mana_modify_wq\n+ U rdmacore50_0_to_mctx\n+\n mana.c.o:\n 0000000000000000 r .LC0\n 0000000000000108 r .LC10\n 0000000000000148 r .LC11\n 0000000000000168 r .LC13\n 00000000000001a0 r .LC14\n 00000000000001c8 r .LC16\n@@ -103,79 +168,14 @@\n 00000000000003c0 T rdmacore50_0_mana_reg_mr\n 0000000000000a80 T rdmacore50_0_to_mctx\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n 0000000000000000 D verbs_provider_mana\n \n-wq.c.o:\n-0000000000000000 r .LC0\n-0000000000000038 r .LC1\n-0000000000000058 r .LC3\n-0000000000000088 r .LC4\n-00000000000000b0 r .LC6\n-00000000000000e0 r .LC8\n- U __errno_location\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n-0000000000000040 r __func__.2\n-0000000000000050 r __func__.3\n- U __stack_chk_fail\n- U calloc\n- U free\n-0000000000000028 t mana_create_rwq_ind_table.cold\n-0000000000000000 t mana_create_wq.cold\n-0000000000000032 t mana_destroy_rwq_ind_table.cold\n-0000000000000014 t mana_destroy_wq.cold\n- U rdmacore50_0___verbs_log\n- U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_create_wq\n- U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_destroy_wq\n-00000000000003c0 T rdmacore50_0_mana_create_rwq_ind_table\n-0000000000000010 T rdmacore50_0_mana_create_wq\n-0000000000000570 T rdmacore50_0_mana_destroy_rwq_ind_table\n-0000000000000290 T rdmacore50_0_mana_destroy_wq\n-0000000000000000 T rdmacore50_0_mana_modify_wq\n- U rdmacore50_0_to_mctx\n-\n-qp.c.o:\n-0000000000000000 r .LC0\n-0000000000000038 r .LC1\n-000000000000001d r .LC10\n-0000000000000060 r .LC2\n-0000000000000080 r .LC4\n-00000000000000b8 r .LC5\n-0000000000000000 r .LC6\n-00000000000000f0 r .LC7\n-0000000000000118 r .LC9\n- U __errno_location\n-0000000000000000 r __func__.0\n-0000000000000020 r __func__.1\n-0000000000000040 r __func__.2\n-0000000000000050 r __func__.3\n-0000000000000068 r __func__.4\n- U __stack_chk_fail\n- U calloc\n- U free\n-0000000000000014 t mana_create_qp.cold\n-0000000000000046 t mana_create_qp_ex.cold\n-0000000000000000 t mana_create_qp_ex_raw\n-0000000000000000 t mana_create_qp_ex_raw.cold\n-0000000000000032 t mana_destroy_qp.cold\n- U rdmacore50_0___verbs_log\n- U rdmacore50_0_ibv_cmd_create_qp\n- U rdmacore50_0_ibv_cmd_create_qp_ex2\n- U rdmacore50_0_ibv_cmd_destroy_qp\n-0000000000000260 T rdmacore50_0_mana_create_qp\n-0000000000000700 T rdmacore50_0_mana_create_qp_ex\n-00000000000005e0 T rdmacore50_0_mana_destroy_qp\n-00000000000005d0 T rdmacore50_0_mana_modify_qp\n- U rdmacore50_0_to_mctx\n-\n manadv.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n 0000000000000000 r __func__.0\n 00000000000000b0 T manadv_init_obj\n 0000000000000000 T manadv_set_context_attr\n 0000000000000000 t manadv_set_context_attr.cold\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 720 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 14976 1970-01-01 00:00:00.000000 mana.c.o\n-?rw-r--r-- 0 0 0 6424 1970-01-01 00:00:00.000000 wq.c.o\n ?rw-r--r-- 0 0 0 7256 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 6424 1970-01-01 00:00:00.000000 wq.c.o\n+?rw-r--r-- 0 0 0 14976 1970-01-01 00:00:00.000000 mana.c.o\n ?rw-r--r-- 0 0 0 2664 1970-01-01 00:00:00.000000 manadv.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmlx4.a", "source2": "./usr/lib/x86_64-linux-gnu/libmlx4.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,35 +1,11 @@\n \n Archive index:\n rdmacore50_0_mlx4_alloc_db in dbrec.c.o\n rdmacore50_0_mlx4_free_db in dbrec.c.o\n-rdmacore50_0_mlx4_poll_cq in cq.c.o\n-rdmacore50_0_mlx4_cq_fill_pfns in cq.c.o\n-rdmacore50_0_mlx4_arm_cq in cq.c.o\n-rdmacore50_0_mlx4_cq_event in cq.c.o\n-rdmacore50_0___mlx4_cq_clean in cq.c.o\n-rdmacore50_0_mlx4_cq_clean in cq.c.o\n-rdmacore50_0_mlx4_get_outstanding_cqes in cq.c.o\n-rdmacore50_0_mlx4_cq_resize_copy_cqes in cq.c.o\n-rdmacore50_0_mlx4_alloc_cq_buf in cq.c.o\n-mlx4dv_init_obj in mlx4.c.o\n-mlx4dv_query_device in mlx4.c.o\n-mlx4dv_set_context_attr in mlx4.c.o\n-verbs_provider_mlx4 in mlx4.c.o\n-rdmacore50_0_mlx4_alloc_buf in buf.c.o\n-rdmacore50_0_mlx4_free_buf in buf.c.o\n-rdmacore50_0_mlx4_free_srq_wqe in srq.c.o\n-rdmacore50_0_mlx4_post_srq_recv in srq.c.o\n-rdmacore50_0_mlx4_alloc_srq_buf in srq.c.o\n-rdmacore50_0_mlx4_init_xsrq_table in srq.c.o\n-rdmacore50_0_mlx4_find_xsrq in srq.c.o\n-rdmacore50_0_mlx4_store_xsrq in srq.c.o\n-rdmacore50_0_mlx4_clear_xsrq in srq.c.o\n-rdmacore50_0_mlx4_create_xrc_srq in srq.c.o\n-rdmacore50_0_mlx4_destroy_xrc_srq in srq.c.o\n rdmacore50_0_mlx4_init_qp_indices in qp.c.o\n rdmacore50_0_mlx4_qp_init_sq_ownership in qp.c.o\n rdmacore50_0_mlx4_post_send in qp.c.o\n rdmacore50_0_mlx4_post_recv in qp.c.o\n rdmacore50_0_mlx4_post_wq_recv in qp.c.o\n rdmacore50_0_mlx4_calc_sq_wqe_size in qp.c.o\n rdmacore50_0_mlx4_alloc_qp_buf in qp.c.o\n@@ -74,27 +50,193 @@\n rdmacore50_0_mlx4_modify_wq in verbs.c.o\n rdmacore50_0_mlx4_create_flow in verbs.c.o\n rdmacore50_0_mlx4_destroy_flow in verbs.c.o\n rdmacore50_0_mlx4_destroy_wq in verbs.c.o\n rdmacore50_0_mlx4_create_rwq_ind_table in verbs.c.o\n rdmacore50_0_mlx4_destroy_rwq_ind_table in verbs.c.o\n rdmacore50_0_mlx4_modify_cq in verbs.c.o\n+rdmacore50_0_mlx4_poll_cq in cq.c.o\n+rdmacore50_0_mlx4_cq_fill_pfns in cq.c.o\n+rdmacore50_0_mlx4_arm_cq in cq.c.o\n+rdmacore50_0_mlx4_cq_event in cq.c.o\n+rdmacore50_0___mlx4_cq_clean in cq.c.o\n+rdmacore50_0_mlx4_cq_clean in cq.c.o\n+rdmacore50_0_mlx4_get_outstanding_cqes in cq.c.o\n+rdmacore50_0_mlx4_cq_resize_copy_cqes in cq.c.o\n+rdmacore50_0_mlx4_alloc_cq_buf in cq.c.o\n+mlx4dv_init_obj in mlx4.c.o\n+mlx4dv_query_device in mlx4.c.o\n+mlx4dv_set_context_attr in mlx4.c.o\n+verbs_provider_mlx4 in mlx4.c.o\n+rdmacore50_0_mlx4_free_srq_wqe in srq.c.o\n+rdmacore50_0_mlx4_post_srq_recv in srq.c.o\n+rdmacore50_0_mlx4_alloc_srq_buf in srq.c.o\n+rdmacore50_0_mlx4_init_xsrq_table in srq.c.o\n+rdmacore50_0_mlx4_find_xsrq in srq.c.o\n+rdmacore50_0_mlx4_store_xsrq in srq.c.o\n+rdmacore50_0_mlx4_clear_xsrq in srq.c.o\n+rdmacore50_0_mlx4_create_xrc_srq in srq.c.o\n+rdmacore50_0_mlx4_destroy_xrc_srq in srq.c.o\n+rdmacore50_0_mlx4_alloc_buf in buf.c.o\n+rdmacore50_0_mlx4_free_buf in buf.c.o\n \n dbrec.c.o:\n 0000000000000000 r db_size\n U free\n U malloc\n U memset\n U pthread_mutex_lock\n U pthread_mutex_unlock\n U rdmacore50_0_mlx4_alloc_buf\n 0000000000000000 T rdmacore50_0_mlx4_alloc_db\n U rdmacore50_0_mlx4_free_buf\n 00000000000001c0 T rdmacore50_0_mlx4_free_db\n \n+qp.c.o:\n+0000000000000000 r .LC0\n+ U calloc\n+ U free\n+ U malloc\n+ U memcpy\n+ U memset\n+0000000000000040 r mlx4_ib_opcode\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_mlx4_alloc_buf\n+00000000000013c0 T rdmacore50_0_mlx4_alloc_qp_buf\n+0000000000001290 T rdmacore50_0_mlx4_calc_sq_wqe_size\n+0000000000001720 T rdmacore50_0_mlx4_clear_qp\n+0000000000001640 T rdmacore50_0_mlx4_find_qp\n+0000000000000000 T rdmacore50_0_mlx4_init_qp_indices\n+0000000000000eb0 T rdmacore50_0_mlx4_post_recv\n+0000000000000210 T rdmacore50_0_mlx4_post_send\n+00000000000010a0 T rdmacore50_0_mlx4_post_wq_recv\n+0000000000000020 T rdmacore50_0_mlx4_qp_init_sq_ownership\n+00000000000015c0 T rdmacore50_0_mlx4_set_sq_sizes\n+0000000000001690 T rdmacore50_0_mlx4_store_qp\n+\n+verbs.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U _GLOBAL_OFFSET_TABLE_\n+ U __errno_location\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t create_qp_ex\n+ U free\n+ U fwrite\n+ U ibv_query_device\n+ U ibv_query_gid\n+ U ibv_query_port\n+ U ibv_resolve_eth_l2_from_gid\n+ U malloc\n+0000000000001a60 T mlx4dv_create_qp\n+ U mmap\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0___mlx4_cq_clean\n+ U rdmacore50_0_ibv_cmd_alloc_mw\n+ U rdmacore50_0_ibv_cmd_alloc_pd\n+ U rdmacore50_0_ibv_cmd_close_xrcd\n+ U rdmacore50_0_ibv_cmd_create_cq\n+ U rdmacore50_0_ibv_cmd_create_cq_ex\n+ U rdmacore50_0_ibv_cmd_create_flow\n+ U rdmacore50_0_ibv_cmd_create_qp_ex\n+ U rdmacore50_0_ibv_cmd_create_qp_ex2\n+ U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n+ U rdmacore50_0_ibv_cmd_create_srq\n+ U rdmacore50_0_ibv_cmd_create_wq\n+ U rdmacore50_0_ibv_cmd_dealloc_mw\n+ U rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_ibv_cmd_dereg_mr\n+ U rdmacore50_0_ibv_cmd_destroy_cq\n+ U rdmacore50_0_ibv_cmd_destroy_flow\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n+ U rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_ibv_cmd_destroy_wq\n+ U rdmacore50_0_ibv_cmd_modify_cq\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+ U rdmacore50_0_ibv_cmd_modify_srq\n+ U rdmacore50_0_ibv_cmd_modify_wq\n+ U rdmacore50_0_ibv_cmd_open_qp\n+ U rdmacore50_0_ibv_cmd_open_xrcd\n+ U rdmacore50_0_ibv_cmd_query_device_any\n+ U rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_cmd_query_qp\n+ U rdmacore50_0_ibv_cmd_query_srq\n+ U rdmacore50_0_ibv_cmd_reg_mr\n+ U rdmacore50_0_ibv_cmd_rereg_mr\n+ U rdmacore50_0_ibv_cmd_resize_cq\n+ U rdmacore50_0_mlx4_alloc_cq_buf\n+ U rdmacore50_0_mlx4_alloc_db\n+0000000000000d40 T rdmacore50_0_mlx4_alloc_mw\n+0000000000000a20 T rdmacore50_0_mlx4_alloc_pd\n+ U rdmacore50_0_mlx4_alloc_qp_buf\n+ U rdmacore50_0_mlx4_alloc_srq_buf\n+0000000000000e10 T rdmacore50_0_mlx4_bind_mw\n+ U rdmacore50_0_mlx4_calc_sq_wqe_size\n+ U rdmacore50_0_mlx4_clear_qp\n+0000000000000b90 T rdmacore50_0_mlx4_close_xrcd\n+ U rdmacore50_0_mlx4_cq_clean\n+ U rdmacore50_0_mlx4_cq_fill_pfns\n+ U rdmacore50_0_mlx4_cq_resize_copy_cqes\n+00000000000021e0 T rdmacore50_0_mlx4_create_ah\n+0000000000000ed0 T rdmacore50_0_mlx4_create_cq\n+00000000000010c0 T rdmacore50_0_mlx4_create_cq_ex\n+0000000000002910 T rdmacore50_0_mlx4_create_flow\n+0000000000001a70 T rdmacore50_0_mlx4_create_qp\n+0000000000001a50 T rdmacore50_0_mlx4_create_qp_ex\n+0000000000002ab0 T rdmacore50_0_mlx4_create_rwq_ind_table\n+0000000000001570 T rdmacore50_0_mlx4_create_srq\n+0000000000001730 T rdmacore50_0_mlx4_create_srq_ex\n+0000000000002540 T rdmacore50_0_mlx4_create_wq\n+ U rdmacore50_0_mlx4_create_xrc_srq\n+0000000000000de0 T rdmacore50_0_mlx4_dealloc_mw\n+0000000000000d10 T rdmacore50_0_mlx4_dereg_mr\n+0000000000002520 T rdmacore50_0_mlx4_destroy_ah\n+0000000000001510 T rdmacore50_0_mlx4_destroy_cq\n+0000000000002990 T rdmacore50_0_mlx4_destroy_flow\n+0000000000001f50 T rdmacore50_0_mlx4_destroy_qp\n+0000000000002b50 T rdmacore50_0_mlx4_destroy_rwq_ind_table\n+00000000000019c0 T rdmacore50_0_mlx4_destroy_srq\n+00000000000029c0 T rdmacore50_0_mlx4_destroy_wq\n+ U rdmacore50_0_mlx4_destroy_xrc_srq\n+ U rdmacore50_0_mlx4_free_buf\n+ U rdmacore50_0_mlx4_free_db\n+0000000000000ac0 T rdmacore50_0_mlx4_free_pd\n+ U rdmacore50_0_mlx4_get_outstanding_cqes\n+0000000000000bc0 T rdmacore50_0_mlx4_get_srq_num\n+ U rdmacore50_0_mlx4_init_qp_indices\n+0000000000002b80 T rdmacore50_0_mlx4_modify_cq\n+0000000000001c60 T rdmacore50_0_mlx4_modify_qp\n+0000000000001940 T rdmacore50_0_mlx4_modify_srq\n+0000000000002860 T rdmacore50_0_mlx4_modify_wq\n+0000000000001b20 T rdmacore50_0_mlx4_open_qp\n+0000000000000af0 T rdmacore50_0_mlx4_open_xrcd\n+ U rdmacore50_0_mlx4_post_send\n+ U rdmacore50_0_mlx4_post_wq_recv\n+ U rdmacore50_0_mlx4_qp_init_sq_ownership\n+00000000000007a0 T rdmacore50_0_mlx4_query_device_ctx\n+00000000000006b0 T rdmacore50_0_mlx4_query_device_ex\n+0000000000000980 T rdmacore50_0_mlx4_query_port\n+0000000000001bd0 T rdmacore50_0_mlx4_query_qp\n+00000000000008e0 T rdmacore50_0_mlx4_query_rt_values\n+0000000000001980 T rdmacore50_0_mlx4_query_srq\n+0000000000000bf0 T rdmacore50_0_mlx4_reg_mr\n+0000000000000cb0 T rdmacore50_0_mlx4_rereg_mr\n+0000000000001370 T rdmacore50_0_mlx4_resize_cq\n+ U rdmacore50_0_mlx4_set_sq_sizes\n+ U rdmacore50_0_mlx4_store_qp\n+ U stderr\n+\n cq.c.o:\n 0000000000000000 r .LC0\n 00000000000000c0 r CSWTCH.48\n 0000000000000080 r CSWTCH.55\n U __printf_chk\n U __stack_chk_fail\n U memcpy\n@@ -206,23 +348,14 @@\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U stderr\n U sysconf\n 0000000000000000 D verbs_provider_mlx4\n \n-buf.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U mmap\n- U munmap\n-0000000000000000 T rdmacore50_0_mlx4_alloc_buf\n-0000000000000120 T rdmacore50_0_mlx4_free_buf\n-\n srq.c.o:\n 0000000000000000 r .LC0\n U __stack_chk_fail\n U calloc\n U free\n U malloc\n U memset\n@@ -245,148 +378,15 @@\n U rdmacore50_0_mlx4_free_buf\n U rdmacore50_0_mlx4_free_db\n 0000000000000000 T rdmacore50_0_mlx4_free_srq_wqe\n 0000000000000380 T rdmacore50_0_mlx4_init_xsrq_table\n 0000000000000050 T rdmacore50_0_mlx4_post_srq_recv\n 0000000000000430 T rdmacore50_0_mlx4_store_xsrq\n \n-qp.c.o:\n-0000000000000000 r .LC0\n- U calloc\n- U free\n- U malloc\n- U memcpy\n- U memset\n-0000000000000040 r mlx4_ib_opcode\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_mlx4_alloc_buf\n-00000000000013c0 T rdmacore50_0_mlx4_alloc_qp_buf\n-0000000000001290 T rdmacore50_0_mlx4_calc_sq_wqe_size\n-0000000000001720 T rdmacore50_0_mlx4_clear_qp\n-0000000000001640 T rdmacore50_0_mlx4_find_qp\n-0000000000000000 T rdmacore50_0_mlx4_init_qp_indices\n-0000000000000eb0 T rdmacore50_0_mlx4_post_recv\n-0000000000000210 T rdmacore50_0_mlx4_post_send\n-00000000000010a0 T rdmacore50_0_mlx4_post_wq_recv\n-0000000000000020 T rdmacore50_0_mlx4_qp_init_sq_ownership\n-00000000000015c0 T rdmacore50_0_mlx4_set_sq_sizes\n-0000000000001690 T rdmacore50_0_mlx4_store_qp\n-\n-verbs.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U _GLOBAL_OFFSET_TABLE_\n+buf.c.o:\n U __errno_location\n- U __snprintf_chk\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t create_qp_ex\n- U free\n- U fwrite\n- U ibv_query_device\n- U ibv_query_gid\n- U ibv_query_port\n- U ibv_resolve_eth_l2_from_gid\n- U malloc\n-0000000000001a60 T mlx4dv_create_qp\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n U mmap\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0___mlx4_cq_clean\n- U rdmacore50_0_ibv_cmd_alloc_mw\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_close_xrcd\n- U rdmacore50_0_ibv_cmd_create_cq\n- U rdmacore50_0_ibv_cmd_create_cq_ex\n- U rdmacore50_0_ibv_cmd_create_flow\n- U rdmacore50_0_ibv_cmd_create_qp_ex\n- U rdmacore50_0_ibv_cmd_create_qp_ex2\n- U rdmacore50_0_ibv_cmd_create_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_create_srq\n- U rdmacore50_0_ibv_cmd_create_wq\n- U rdmacore50_0_ibv_cmd_dealloc_mw\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_destroy_cq\n- U rdmacore50_0_ibv_cmd_destroy_flow\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_destroy_rwq_ind_table\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_ibv_cmd_destroy_wq\n- U rdmacore50_0_ibv_cmd_modify_cq\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_ibv_cmd_modify_wq\n- U rdmacore50_0_ibv_cmd_open_qp\n- U rdmacore50_0_ibv_cmd_open_xrcd\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_query_qp\n- U rdmacore50_0_ibv_cmd_query_srq\n- U rdmacore50_0_ibv_cmd_reg_mr\n- U rdmacore50_0_ibv_cmd_rereg_mr\n- U rdmacore50_0_ibv_cmd_resize_cq\n- U rdmacore50_0_mlx4_alloc_cq_buf\n- U rdmacore50_0_mlx4_alloc_db\n-0000000000000d40 T rdmacore50_0_mlx4_alloc_mw\n-0000000000000a20 T rdmacore50_0_mlx4_alloc_pd\n- U rdmacore50_0_mlx4_alloc_qp_buf\n- U rdmacore50_0_mlx4_alloc_srq_buf\n-0000000000000e10 T rdmacore50_0_mlx4_bind_mw\n- U rdmacore50_0_mlx4_calc_sq_wqe_size\n- U rdmacore50_0_mlx4_clear_qp\n-0000000000000b90 T rdmacore50_0_mlx4_close_xrcd\n- U rdmacore50_0_mlx4_cq_clean\n- U rdmacore50_0_mlx4_cq_fill_pfns\n- U rdmacore50_0_mlx4_cq_resize_copy_cqes\n-00000000000021e0 T rdmacore50_0_mlx4_create_ah\n-0000000000000ed0 T rdmacore50_0_mlx4_create_cq\n-00000000000010c0 T rdmacore50_0_mlx4_create_cq_ex\n-0000000000002910 T rdmacore50_0_mlx4_create_flow\n-0000000000001a70 T rdmacore50_0_mlx4_create_qp\n-0000000000001a50 T rdmacore50_0_mlx4_create_qp_ex\n-0000000000002ab0 T rdmacore50_0_mlx4_create_rwq_ind_table\n-0000000000001570 T rdmacore50_0_mlx4_create_srq\n-0000000000001730 T rdmacore50_0_mlx4_create_srq_ex\n-0000000000002540 T rdmacore50_0_mlx4_create_wq\n- U rdmacore50_0_mlx4_create_xrc_srq\n-0000000000000de0 T rdmacore50_0_mlx4_dealloc_mw\n-0000000000000d10 T rdmacore50_0_mlx4_dereg_mr\n-0000000000002520 T rdmacore50_0_mlx4_destroy_ah\n-0000000000001510 T rdmacore50_0_mlx4_destroy_cq\n-0000000000002990 T rdmacore50_0_mlx4_destroy_flow\n-0000000000001f50 T rdmacore50_0_mlx4_destroy_qp\n-0000000000002b50 T rdmacore50_0_mlx4_destroy_rwq_ind_table\n-00000000000019c0 T rdmacore50_0_mlx4_destroy_srq\n-00000000000029c0 T rdmacore50_0_mlx4_destroy_wq\n- U rdmacore50_0_mlx4_destroy_xrc_srq\n- U rdmacore50_0_mlx4_free_buf\n- U rdmacore50_0_mlx4_free_db\n-0000000000000ac0 T rdmacore50_0_mlx4_free_pd\n- U rdmacore50_0_mlx4_get_outstanding_cqes\n-0000000000000bc0 T rdmacore50_0_mlx4_get_srq_num\n- U rdmacore50_0_mlx4_init_qp_indices\n-0000000000002b80 T rdmacore50_0_mlx4_modify_cq\n-0000000000001c60 T rdmacore50_0_mlx4_modify_qp\n-0000000000001940 T rdmacore50_0_mlx4_modify_srq\n-0000000000002860 T rdmacore50_0_mlx4_modify_wq\n-0000000000001b20 T rdmacore50_0_mlx4_open_qp\n-0000000000000af0 T rdmacore50_0_mlx4_open_xrcd\n- U rdmacore50_0_mlx4_post_send\n- U rdmacore50_0_mlx4_post_wq_recv\n- U rdmacore50_0_mlx4_qp_init_sq_ownership\n-00000000000007a0 T rdmacore50_0_mlx4_query_device_ctx\n-00000000000006b0 T rdmacore50_0_mlx4_query_device_ex\n-0000000000000980 T rdmacore50_0_mlx4_query_port\n-0000000000001bd0 T rdmacore50_0_mlx4_query_qp\n-00000000000008e0 T rdmacore50_0_mlx4_query_rt_values\n-0000000000001980 T rdmacore50_0_mlx4_query_srq\n-0000000000000bf0 T rdmacore50_0_mlx4_reg_mr\n-0000000000000cb0 T rdmacore50_0_mlx4_rereg_mr\n-0000000000001370 T rdmacore50_0_mlx4_resize_cq\n- U rdmacore50_0_mlx4_set_sq_sizes\n- U rdmacore50_0_mlx4_store_qp\n- U stderr\n+ U munmap\n+0000000000000000 T rdmacore50_0_mlx4_alloc_buf\n+0000000000000120 T rdmacore50_0_mlx4_free_buf\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,8 +1,8 @@\n ---------- 0 0 0 2590 1970-01-01 00:00:00.000000 /\n ?rw-r--r-- 0 0 0 2736 1970-01-01 00:00:00.000000 dbrec.c.o\n+?rw-r--r-- 0 0 0 10096 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 27560 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r-- 0 0 0 13272 1970-01-01 00:00:00.000000 cq.c.o\n ?rw-r--r-- 0 0 0 11232 1970-01-01 00:00:00.000000 mlx4.c.o\n-?rw-r--r-- 0 0 0 2160 1970-01-01 00:00:00.000000 buf.c.o\n ?rw-r--r-- 0 0 0 6776 1970-01-01 00:00:00.000000 srq.c.o\n-?rw-r--r-- 0 0 0 10096 1970-01-01 00:00:00.000000 qp.c.o\n-?rw-r--r-- 0 0 0 27560 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 2160 1970-01-01 00:00:00.000000 buf.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmlx5.a", "source2": "./usr/lib/x86_64-linux-gnu/libmlx5.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,260 +1,17 @@\n \n Archive index:\n-rdmacore50_0_dr_devx_query_esw_vport_context in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_gvmi in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_esw_caps in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_device in dr_devx.c.o\n-rdmacore50_0_dr_devx_sync_steering in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_flow_table in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_flow_table in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_always_hit_ft in dr_devx.c.o\n-rdmacore50_0_dr_devx_destroy_always_hit_ft in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_flow_sampler in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_flow_sampler in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_definer in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_reformat_ctx in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_meter in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_meter in dr_devx.c.o\n-rdmacore50_0_dr_devx_modify_meter in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_qp in dr_devx.c.o\n-rdmacore50_0_dr_devx_modify_qp_rst2init in dr_devx.c.o\n-rdmacore50_0_dr_devx_modify_qp_init2rtr in dr_devx.c.o\n-rdmacore50_0_dr_devx_modify_qp_rtr2rts in dr_devx.c.o\n-rdmacore50_0_dr_devx_query_gid in dr_devx.c.o\n-rdmacore50_0_dr_devx_create_modify_header_arg in dr_devx.c.o\n-mlx5dv_vfio_get_events_fd in mlx5_vfio.c.o\n-mlx5dv_vfio_process_events in mlx5_vfio.c.o\n-mlx5dv_get_vfio_device_list in mlx5_vfio.c.o\n-rdmacore50_0_is_mlx5_vfio_dev in mlx5_vfio.c.o\n-rdmacore50_0_dr_ptrn_sync_pool in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_cache_get_pattern in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_cache_put_pattern in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_mngr_create in dr_ptrn.c.o\n-rdmacore50_0_dr_ptrn_mngr_destroy in dr_ptrn.c.o\n rdmacore50_0_mlx5_alloc_dbrec in dbrec.c.o\n rdmacore50_0_mlx5_free_db in dbrec.c.o\n-rdmacore50_0_dr_buddy_init in dr_buddy.c.o\n-rdmacore50_0_dr_buddy_cleanup in dr_buddy.c.o\n-rdmacore50_0_dr_buddy_alloc_mem in dr_buddy.c.o\n-rdmacore50_0_dr_buddy_free_mem in dr_buddy.c.o\n-rdmacore50_0_dr_ste_calc_hash_index in dr_ste.c.o\n-rdmacore50_0_dr_ste_conv_bit_to_byte_mask in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_bit_mask in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_miss_addr in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_hit_addr in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_hit_gvmi in dr_ste.c.o\n-rdmacore50_0_dr_ste_get_icm_addr in dr_ste.c.o\n-rdmacore50_0_dr_ste_get_mr_addr in dr_ste.c.o\n-rdmacore50_0_dr_ste_get_miss_list in dr_ste.c.o\n-rdmacore50_0_dr_ste_get_miss_list_top in dr_ste.c.o\n-rdmacore50_0_dr_ste_is_last_in_rule in dr_ste.c.o\n-rdmacore50_0_dr_ste_equal_tag in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_hit_addr_by_next_htbl in dr_ste.c.o\n-rdmacore50_0_dr_ste_prepare_for_postsend in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_formated_ste in dr_ste.c.o\n-rdmacore50_0_dr_ste_free in dr_ste.c.o\n-rdmacore50_0_dr_ste_htbl_init_and_postsend in dr_ste.c.o\n-rdmacore50_0_dr_ste_htbl_alloc in dr_ste.c.o\n-rdmacore50_0_dr_ste_create_next_htbl in dr_ste.c.o\n-rdmacore50_0_dr_ste_htbl_free in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_actions_tx in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_actions_rx in dr_ste.c.o\n-rdmacore50_0_dr_ste_conv_modify_hdr_sw_field in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_action_set in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_action_add in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_action_copy in dr_ste.c.o\n-rdmacore50_0_dr_ste_set_action_decap_l3_list in dr_ste.c.o\n-rdmacore50_0_dr_ste_alloc_modify_hdr in dr_ste.c.o\n-rdmacore50_0_dr_ste_free_modify_hdr in dr_ste.c.o\n-rdmacore50_0_dr_ste_alloc_encap in dr_ste.c.o\n-rdmacore50_0_dr_ste_free_encap in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_pre_check in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_ste_arr in dr_ste.c.o\n-rdmacore50_0_dr_ste_copy_param in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l2_src_dst in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l3_ipv6_dst in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l3_ipv6_src in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l3_ipv4_5_tuple in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l2_src in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l2_dst in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l2_tnl in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l3_ipv4_misc in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_ipv6_l3_l4 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_empty_always_hit in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_mpls in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_gre in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_mpls_over_gre in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_mpls_over_udp in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt_exist in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_icmp in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_general_purpose in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_eth_l4_misc in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_vxlan_gpe in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_geneve in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_gtpu in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_0 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_1 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_register_0 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_register_1 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_src_gvmi_qpn in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_flex_parser_0 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_flex_parser_1 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_tunnel_header in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_ib_l4 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def0 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def2 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def6 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def16 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def22 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def24 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def25 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def26 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def28 in dr_ste.c.o\n-rdmacore50_0_dr_ste_build_def33 in dr_ste.c.o\n-rdmacore50_0_dr_ste_get_ctx in dr_ste.c.o\n-mlx5dv_dr_aso_other_domain_link in dr_ste.c.o\n-mlx5dv_dr_aso_other_domain_unlink in dr_ste.c.o\n-mlx5dv_dr_matcher_set_layout in dr_matcher.c.o\n-mlx5dv_dr_matcher_create in dr_matcher.c.o\n-mlx5dv_dr_matcher_destroy in dr_matcher.c.o\n-rdmacore50_0_dr_icm_pool_sync_pool in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_alloc_chunk in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_free_chunk in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_get_chunk_icm_addr in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_get_chunk_mr_addr in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_get_chunk_rkey in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_create in dr_icm_pool.c.o\n-rdmacore50_0_dr_icm_pool_destroy in dr_icm_pool.c.o\n-rdmacore50_0_mlx5_stall_cq_poll_min in cq.c.o\n-rdmacore50_0_mlx5_stall_cq_dec_step in cq.c.o\n-rdmacore50_0_mlx5_stall_cq_poll_max in cq.c.o\n-rdmacore50_0_mlx5_stall_cq_inc_step in cq.c.o\n-rdmacore50_0_mlx5_stall_num_loop in cq.c.o\n-rdmacore50_0_mlx5_poll_cq in cq.c.o\n-rdmacore50_0_mlx5_poll_cq_v1 in cq.c.o\n-rdmacore50_0_mlx5_cq_fill_pfns in cq.c.o\n-rdmacore50_0_mlx5_arm_cq in cq.c.o\n-rdmacore50_0_mlx5_cq_event in cq.c.o\n-rdmacore50_0___mlx5_cq_clean in cq.c.o\n-rdmacore50_0_mlx5_cq_clean in cq.c.o\n-rdmacore50_0_mlx5_cq_resize_copy_cqes in cq.c.o\n-rdmacore50_0_mlx5_alloc_cq_buf in cq.c.o\n-rdmacore50_0_mlx5_free_cq_buf in cq.c.o\n-mlx5dv_dump_dr_domain in dr_dbg.c.o\n-mlx5dv_dump_dr_table in dr_dbg.c.o\n-mlx5dv_dump_dr_matcher in dr_dbg.c.o\n-mlx5dv_dump_dr_rule in dr_dbg.c.o\n-rdmacore50_0_mlx5_free_buf_extern in buf.c.o\n-rdmacore50_0_mlx5_alloc_buf_extern in buf.c.o\n-rdmacore50_0_mlx5_free_actual_buf in buf.c.o\n-rdmacore50_0_mlx5_is_custom_alloc in buf.c.o\n-rdmacore50_0_mlx5_is_extern_alloc in buf.c.o\n-rdmacore50_0_mlx5_get_alloc_type in buf.c.o\n-rdmacore50_0_mlx5_alloc_buf_contig in buf.c.o\n-rdmacore50_0_mlx5_alloc_prefered_buf in buf.c.o\n-rdmacore50_0_mlx5_free_buf_contig in buf.c.o\n-rdmacore50_0_mlx5_alloc_buf in buf.c.o\n-rdmacore50_0_mlx5_free_buf in buf.c.o\n-rdmacore50_0_dr_ste_v1_set_aso_ct in dr_ste_v1.c.o\n-rdmacore50_0_dr_ste_get_ctx_v1 in dr_ste_v1.c.o\n-rdmacore50_0_mlx5_copy_to_recv_srq in srq.c.o\n-rdmacore50_0_mlx5_free_srq_wqe in srq.c.o\n-rdmacore50_0_srq_cooldown_wqe in srq.c.o\n-rdmacore50_0_mlx5_complete_odp_fault in srq.c.o\n-rdmacore50_0_mlx5_post_srq_recv in srq.c.o\n-rdmacore50_0_mlx5_alloc_srq_buf in srq.c.o\n-rdmacore50_0_mlx5_find_srq in srq.c.o\n-rdmacore50_0_mlx5_store_srq in srq.c.o\n-rdmacore50_0_mlx5_clear_srq in srq.c.o\n-rdmacore50_0_dr_vports_table_get_vport_cap in dr_vports.c.o\n-rdmacore50_0_dr_vports_table_get_ib_port_cap in dr_vports.c.o\n-rdmacore50_0_dr_vports_table_add_wire in dr_vports.c.o\n-rdmacore50_0_dr_vports_table_del_wire in dr_vports.c.o\n-rdmacore50_0_dr_vports_table_create in dr_vports.c.o\n-rdmacore50_0_dr_vports_table_destroy in dr_vports.c.o\n-rdmacore50_0_dr_actions_build_ste_arr in dr_action.c.o\n-rdmacore50_0_dr_actions_build_attr in dr_action.c.o\n-mlx5dv_dr_action_create_drop in dr_action.c.o\n-mlx5dv_dr_action_create_default_miss in dr_action.c.o\n-mlx5dv_dr_action_create_dest_ibv_qp in dr_action.c.o\n-mlx5dv_dr_action_create_dest_devx_tir in dr_action.c.o\n-mlx5dv_dr_action_create_dest_table in dr_action.c.o\n-mlx5dv_dr_action_create_dest_root_table in dr_action.c.o\n-mlx5dv_dr_action_create_flow_counter in dr_action.c.o\n-mlx5dv_dr_action_create_aso in dr_action.c.o\n-mlx5dv_dr_action_modify_aso in dr_action.c.o\n-mlx5dv_dr_action_create_tag in dr_action.c.o\n-mlx5dv_dr_action_create_packet_reformat in dr_action.c.o\n-mlx5dv_dr_action_create_pop_vlan in dr_action.c.o\n-mlx5dv_dr_action_create_push_vlan in dr_action.c.o\n-rdmacore50_0_dr_actions_reformat_get_id in dr_action.c.o\n-mlx5dv_dr_action_create_modify_header in dr_action.c.o\n-mlx5dv_dr_action_modify_flow_meter in dr_action.c.o\n-mlx5dv_dr_action_create_flow_meter in dr_action.c.o\n-mlx5dv_dr_action_create_dest_vport in dr_action.c.o\n-mlx5dv_dr_action_create_dest_ib_port in dr_action.c.o\n-mlx5dv_dr_action_create_dest_array in dr_action.c.o\n-mlx5dv_dr_action_destroy in dr_action.c.o\n-mlx5dv_dr_action_create_flow_sampler in dr_action.c.o\n-mlx5dv_dr_table_create in dr_table.c.o\n-mlx5dv_dr_table_destroy in dr_table.c.o\n-rdmacore50_0_dr_ste_get_ctx_v0 in dr_ste_v0.c.o\n rdmacore50_0_dr_rule_send_update_list in dr_rule.c.o\n rdmacore50_0_dr_rule_rehash_matcher_s_anchor in dr_rule.c.o\n rdmacore50_0_dr_rule_set_last_member in dr_rule.c.o\n rdmacore50_0_dr_rule_get_reverse_rule_members in dr_rule.c.o\n mlx5dv_dr_rule_create in dr_rule.c.o\n mlx5dv_dr_rule_destroy in dr_rule.c.o\n-rdmacore50_0_dr_send_fill_and_append_ste_send_info in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_ste in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_htbl in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_formated_htbl in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_action in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_pattern in dr_send.c.o\n-rdmacore50_0_dr_send_postsend_args in dr_send.c.o\n-rdmacore50_0_dr_send_allow_fl in dr_send.c.o\n-rdmacore50_0_dr_send_ring_free in dr_send.c.o\n-rdmacore50_0_dr_send_ring_alloc in dr_send.c.o\n-rdmacore50_0_dr_send_ring_force_drain in dr_send.c.o\n-rdmacore50_0_mlx5_copy_to_recv_wqe in qp.c.o\n-rdmacore50_0_mlx5_copy_to_send_wqe in qp.c.o\n-rdmacore50_0_mlx5_get_send_wqe in qp.c.o\n-rdmacore50_0_mlx5_init_rwq_indices in qp.c.o\n-rdmacore50_0_mlx5_init_qp_indices in qp.c.o\n-rdmacore50_0_mlx5_get_atomic_laddr in qp.c.o\n-rdmacore50_0_mlx5_post_send in qp.c.o\n-rdmacore50_0_mlx5_qp_fill_wr_complete_error in qp.c.o\n-rdmacore50_0_mlx5_qp_fill_wr_complete_real in qp.c.o\n-rdmacore50_0_mlx5_qp_fill_wr_pfns in qp.c.o\n-rdmacore50_0_mlx5_bind_mw in qp.c.o\n-rdmacore50_0_mlx5_post_wq_recv in qp.c.o\n-rdmacore50_0_mlx5_post_recv in qp.c.o\n-rdmacore50_0_mlx5_post_srq_ops in qp.c.o\n-rdmacore50_0_mlx5_use_huge in qp.c.o\n-rdmacore50_0_mlx5_find_qp in qp.c.o\n-rdmacore50_0_mlx5_store_qp in qp.c.o\n-rdmacore50_0_mlx5_clear_qp in qp.c.o\n-mlx5dv_qp_cancel_posted_send_wrs in qp.c.o\n-rdmacore50_0_dr_domain_is_support_sw_encap in dr_domain.c.o\n-rdmacore50_0_dr_domain_is_support_modify_hdr_cache in dr_domain.c.o\n-rdmacore50_0_dr_domain_is_support_ste_icm_size in dr_domain.c.o\n-rdmacore50_0_dr_domain_set_max_ste_icm_size in dr_domain.c.o\n-mlx5dv_dr_domain_create in dr_domain.c.o\n-mlx5dv_dr_domain_sync in dr_domain.c.o\n-mlx5dv_dr_domain_set_reclaim_device_memory in dr_domain.c.o\n-mlx5dv_dr_domain_allow_duplicate_rules in dr_domain.c.o\n-mlx5dv_dr_domain_destroy in dr_domain.c.o\n-rdmacore50_0_dr_arg_get_object_id in dr_arg.c.o\n-rdmacore50_0_dr_arg_get_obj in dr_arg.c.o\n-rdmacore50_0_dr_arg_put_obj in dr_arg.c.o\n-rdmacore50_0_dr_arg_mngr_create in dr_arg.c.o\n-rdmacore50_0_dr_arg_mngr_destroy in dr_arg.c.o\n rdmacore50_0_mlx5_debug_mask in mlx5.c.o\n rdmacore50_0_mlx5_freeze_on_error_cqe in mlx5.c.o\n rdmacore50_0_mlx5_cmd_status_to_err in mlx5.c.o\n rdmacore50_0_mlx5_get_cmd_status_err in mlx5.c.o\n rdmacore50_0_mlx5_store_uidx in mlx5.c.o\n rdmacore50_0_mlx5_clear_uidx in mlx5.c.o\n rdmacore50_0_mlx5_find_mkey in mlx5.c.o\n@@ -286,17 +43,33 @@\n mlx5dv_set_context_attr in mlx5.c.o\n mlx5dv_get_clock_info in mlx5.c.o\n mlx5dv_is_supported in mlx5.c.o\n mlx5dv_open_device in mlx5.c.o\n rdmacore50_0_mlx5_get_dv_ops in mlx5.c.o\n rdmacore50_0_mlx5_hca_table in mlx5.c.o\n verbs_provider_mlx5 in mlx5.c.o\n-rdmacore50_0_dr_crc32_init_table in dr_crc32.c.o\n-rdmacore50_0_dr_crc32_slice8_calc in dr_crc32.c.o\n-rdmacore50_0_dr_ste_get_ctx_v2 in dr_ste_v2.c.o\n+rdmacore50_0_mlx5_copy_to_recv_wqe in qp.c.o\n+rdmacore50_0_mlx5_copy_to_send_wqe in qp.c.o\n+rdmacore50_0_mlx5_get_send_wqe in qp.c.o\n+rdmacore50_0_mlx5_init_rwq_indices in qp.c.o\n+rdmacore50_0_mlx5_init_qp_indices in qp.c.o\n+rdmacore50_0_mlx5_get_atomic_laddr in qp.c.o\n+rdmacore50_0_mlx5_post_send in qp.c.o\n+rdmacore50_0_mlx5_qp_fill_wr_complete_error in qp.c.o\n+rdmacore50_0_mlx5_qp_fill_wr_complete_real in qp.c.o\n+rdmacore50_0_mlx5_qp_fill_wr_pfns in qp.c.o\n+rdmacore50_0_mlx5_bind_mw in qp.c.o\n+rdmacore50_0_mlx5_post_wq_recv in qp.c.o\n+rdmacore50_0_mlx5_post_recv in qp.c.o\n+rdmacore50_0_mlx5_post_srq_ops in qp.c.o\n+rdmacore50_0_mlx5_use_huge in qp.c.o\n+rdmacore50_0_mlx5_find_qp in qp.c.o\n+rdmacore50_0_mlx5_store_qp in qp.c.o\n+rdmacore50_0_mlx5_clear_qp in qp.c.o\n+mlx5dv_qp_cancel_posted_send_wrs in qp.c.o\n rdmacore50_0_mlx5_single_threaded in verbs.c.o\n rdmacore50_0__mlx5dv_create_flow in verbs.c.o\n rdmacore50_0_mlx5_query_rt_values in verbs.c.o\n rdmacore50_0_mlx5_query_port in verbs.c.o\n rdmacore50_0_mlx5_async_event in verbs.c.o\n rdmacore50_0_mlx5_alloc_pd in verbs.c.o\n rdmacore50_0_mlx5_alloc_td in verbs.c.o\n@@ -428,252 +201,241 @@\n mlx5dv_pp_alloc in verbs.c.o\n mlx5dv_pp_free in verbs.c.o\n mlx5dv_devx_alloc_msi_vector in verbs.c.o\n mlx5dv_devx_free_msi_vector in verbs.c.o\n mlx5dv_devx_create_eq in verbs.c.o\n mlx5dv_devx_destroy_eq in verbs.c.o\n rdmacore50_0_mlx5_set_dv_ctx_ops in verbs.c.o\n-\n-dr_devx.c.o:\n-0000000000000000 r .LC0\n-0000000000000008 r .LC1\n-0000000000000040 r .LC10\n-0000000000000010 r .LC3\n-0000000000000018 r .LC5\n-0000000000000020 r .LC6\n-0000000000000028 r .LC7\n-0000000000000030 r .LC8\n-0000000000000038 r .LC9\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n- U free\n- U memcpy\n- U mlx5dv_devx_general_cmd\n- U mlx5dv_devx_obj_create\n- U mlx5dv_devx_obj_destroy\n- U mlx5dv_devx_obj_modify\n- U mlx5dv_devx_obj_query\n-0000000000000cd0 T rdmacore50_0_dr_devx_create_always_hit_ft\n-0000000000001410 T rdmacore50_0_dr_devx_create_definer\n-0000000000001240 T rdmacore50_0_dr_devx_create_flow_sampler\n-0000000000000a30 T rdmacore50_0_dr_devx_create_flow_table\n-0000000000001600 T rdmacore50_0_dr_devx_create_meter\n-0000000000001e40 T rdmacore50_0_dr_devx_create_modify_header_arg\n-00000000000018e0 T rdmacore50_0_dr_devx_create_qp\n-00000000000014e0 T rdmacore50_0_dr_devx_create_reformat_ctx\n-0000000000001210 T rdmacore50_0_dr_devx_destroy_always_hit_ft\n-00000000000017f0 T rdmacore50_0_dr_devx_modify_meter\n-0000000000001b60 T rdmacore50_0_dr_devx_modify_qp_init2rtr\n-0000000000001a90 T rdmacore50_0_dr_devx_modify_qp_rst2init\n-0000000000001ca0 T rdmacore50_0_dr_devx_modify_qp_rtr2rts\n-00000000000002c0 T rdmacore50_0_dr_devx_query_device\n-00000000000001a0 T rdmacore50_0_dr_devx_query_esw_caps\n-0000000000000000 T rdmacore50_0_dr_devx_query_esw_vport_context\n-0000000000001340 T rdmacore50_0_dr_devx_query_flow_sampler\n-0000000000000b80 T rdmacore50_0_dr_devx_query_flow_table\n-0000000000001d70 T rdmacore50_0_dr_devx_query_gid\n-00000000000000e0 T rdmacore50_0_dr_devx_query_gvmi\n-0000000000001720 T rdmacore50_0_dr_devx_query_meter\n-00000000000009a0 T rdmacore50_0_dr_devx_sync_steering\n- U rdmacore50_0_mlx5_get_cmd_status_err\n-\n-mlx5_vfio.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000089 r .LC10\n-0000000000000093 r .LC11\n-00000000000000a0 r .LC12\n-00000000000000b1 r .LC13\n-00000000000000c3 r .LC14\n-00000000000000d0 r .LC15\n-0000000000000000 r .LC16\n-0000000000000028 r .LC17\n-0000000000000008 r .LC18\n-000000000000000f r .LC2\n-00000000000000e7 r .LC20\n-0000000000000078 r .LC21\n-00000000000000f9 r .LC22\n-0000000000000103 r .LC23\n-000000000000010d r .LC24\n-0000000000000110 r .LC25\n-000000000000011d r .LC26\n-00000000000000a8 r .LC27\n-00000000000000d8 r .LC28\n-0000000000000108 r .LC29\n-000000000000001e r .LC3\n-0000000000000140 r .LC30\n-0000000000000129 r .LC31\n-0000000000000147 r .LC32\n-0000000000000010 r .LC33\n-0000000000000018 r .LC34\n-0000000000000000 r .LC35\n-0000000000000156 r .LC38\n-000000000000016e r .LC39\n-000000000000002c r .LC4\n-0000000000000183 r .LC40\n-00000000000001a0 r .LC41\n-00000000000001b3 r .LC42\n-00000000000001c7 r .LC43\n-00000000000001d7 r .LC44\n-00000000000001ef r .LC45\n-00000000000001f8 r .LC46\n-000000000000020e r .LC47\n-000000000000021a r .LC48\n-000000000000022b r .LC49\n-000000000000003a r .LC5\n-000000000000023e r .LC50\n-0000000000000160 r .LC51\n-000000000000025b r .LC52\n-0000000000000272 r .LC53\n-000000000000028a r .LC54\n-00000000000002a0 r .LC55\n-00000000000002a9 r .LC56\n-00000000000002b4 r .LC57\n-00000000000002c2 r .LC58\n-00000000000002d2 r .LC59\n-000000000000004b r .LC6\n-00000000000002e1 r .LC60\n-00000000000002f2 r .LC61\n-0000000000000305 r .LC62\n-0000000000000058 r .LC7\n-0000000000000066 r .LC8\n-0000000000000076 r .LC9\n- U __errno_location\n-0000000000000da0 r __func__.2\n-0000000000000dc0 r __func__.3\n- U __isoc23_sscanf\n- U __isoc23_strtoul\n- U __pread_chk\n- U __snprintf_chk\n- U __sprintf_chk\n- U __stack_chk_fail\n- U __strncat_chk\n- U __vfprintf_chk\n- U abort\n-0000000000000330 t alloc_cmd_box\n- U basename\n- U calloc\n- U close\n-0000000000000000 b curr.0\n- U eventfd\n- U free\n- U gettimeofday\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U ioctl\n- U memcpy\n- U memset\n-0000000000000060 t mlx5_err\n-0000000000001060 t mlx5_vfio_alloc_cmd_msg.constprop.0\n-0000000000004c30 t mlx5_vfio_alloc_context\n-0000000000004a40 t mlx5_vfio_alloc_pd\n-00000000000011a0 t mlx5_vfio_clean_cmd_interface\n-0000000000000df0 t mlx5_vfio_clean_device_dma\n-00000000000005e0 t mlx5_vfio_cmd_check\n-00000000000009f0 t mlx5_vfio_cmd_comp\n-00000000000028c0 t mlx5_vfio_cmd_do\n-00000000000020f0 t mlx5_vfio_cmd_exec.constprop.0\n-0000000000000060 d mlx5_vfio_common_ops\n-0000000000003cc0 t mlx5_vfio_dealloc_pd\n-0000000000006450 t mlx5_vfio_dereg_mr\n-0000000000000000 d mlx5_vfio_dev_ops\n-0000000000000000 d mlx5_vfio_dv_ctx_ops\n-0000000000000a60 t mlx5_vfio_enable_pci_cmd\n-0000000000001440 t mlx5_vfio_enlarge_cmd_msg\n-0000000000000ee0 t mlx5_vfio_free_cmd_slot\n-0000000000004830 t mlx5_vfio_free_context\n-0000000000000470 t mlx5_vfio_free_page\n-0000000000003ae0 t mlx5_vfio_get_caps_mode\n-0000000000000b50 t mlx5_vfio_get_iommu_group_id\n-0000000000002240 t mlx5_vfio_give_pages\n-00000000000001c0 t mlx5_vfio_new_block\n-0000000000001640 t mlx5_vfio_post_cmd\n-0000000000002560 t mlx5_vfio_process_async_events\n-0000000000001a30 t mlx5_vfio_process_page_request_comp\n-0000000000003da0 t mlx5_vfio_reg_mr\n-0000000000001db0 t mlx5_vfio_setup_cmd_slot.part.0\n-00000000000046b0 t mlx5_vfio_teardown_hca.isra.0\n-0000000000000190 t mlx5_vfio_uninit_device\n-0000000000007090 T mlx5dv_get_vfio_device_list\n-0000000000006c20 T mlx5dv_vfio_get_events_fd\n-0000000000006c30 T mlx5dv_vfio_process_events\n-0000000000000000 t mlx5dv_vfio_process_events.cold\n- U mmap\n- U munmap\n- U open\n- U poll\n- U posix_memalign\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U pwrite\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_bitmap_find_first_bit\n-00000000000071b0 T rdmacore50_0_is_mlx5_vfio_dev\n- U rdmacore50_0_iset_alloc_range\n- U rdmacore50_0_iset_create\n- U rdmacore50_0_iset_destroy\n- U rdmacore50_0_iset_insert_range\n- U rdmacore50_0_mlx5_close_debug_file\n- U rdmacore50_0_mlx5_cmd_status_to_err\n- U rdmacore50_0_mlx5_hca_table\n- U rdmacore50_0_mlx5_open_debug_file\n- U rdmacore50_0_mlx5_set_debug_mask\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n- U read\n- U readlink\n- U realloc\n- U sched_yield\n-0000000000000010 b start.1\n- U stat\n- U strdup\n- U strlen\n- U sysconf\n- U usleep\n-0000000000000850 t vfio_devx_alloc_msi_vector\n-0000000000000120 t vfio_devx_alloc_uar\n-0000000000003800 t vfio_devx_create_eq\n-0000000000006230 t vfio_devx_destroy_eq\n-0000000000000710 t vfio_devx_free_msi_vector\n-00000000000001b0 t vfio_devx_free_uar\n-00000000000037e0 t vfio_devx_general_cmd\n-0000000000002d70 t vfio_devx_obj_create\n-0000000000003c20 t vfio_devx_obj_destroy\n-0000000000003ac0 t vfio_devx_obj_modify\n-0000000000002d50 t vfio_devx_obj_query\n-0000000000000000 t vfio_devx_query_eqn\n-0000000000006680 t vfio_devx_umem_dereg\n-00000000000068c0 t vfio_devx_umem_reg\n-0000000000004300 t vfio_devx_umem_reg_ex\n-0000000000000020 t vfio_init_obj\n- U write\n-\n-dr_ptrn.c.o:\n- U __errno_location\n- U calloc\n- U free\n- U ibv_get_device_name\n- U memcpy\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n- U rdmacore50_0_dr_icm_alloc_chunk\n- U rdmacore50_0_dr_icm_free_chunk\n- U rdmacore50_0_dr_icm_pool_create\n- U rdmacore50_0_dr_icm_pool_destroy\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_icm_pool_sync_pool\n-0000000000000010 T rdmacore50_0_dr_ptrn_cache_get_pattern\n-0000000000000370 T rdmacore50_0_dr_ptrn_cache_put_pattern\n-00000000000003d0 T rdmacore50_0_dr_ptrn_mngr_create\n-0000000000000460 T rdmacore50_0_dr_ptrn_mngr_destroy\n-0000000000000000 T rdmacore50_0_dr_ptrn_sync_pool\n- U rdmacore50_0_dr_send_postsend_pattern\n+rdmacore50_0_dr_ste_calc_hash_index in dr_ste.c.o\n+rdmacore50_0_dr_ste_conv_bit_to_byte_mask in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_bit_mask in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_miss_addr in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_hit_addr in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_hit_gvmi in dr_ste.c.o\n+rdmacore50_0_dr_ste_get_icm_addr in dr_ste.c.o\n+rdmacore50_0_dr_ste_get_mr_addr in dr_ste.c.o\n+rdmacore50_0_dr_ste_get_miss_list in dr_ste.c.o\n+rdmacore50_0_dr_ste_get_miss_list_top in dr_ste.c.o\n+rdmacore50_0_dr_ste_is_last_in_rule in dr_ste.c.o\n+rdmacore50_0_dr_ste_equal_tag in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_hit_addr_by_next_htbl in dr_ste.c.o\n+rdmacore50_0_dr_ste_prepare_for_postsend in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_formated_ste in dr_ste.c.o\n+rdmacore50_0_dr_ste_free in dr_ste.c.o\n+rdmacore50_0_dr_ste_htbl_init_and_postsend in dr_ste.c.o\n+rdmacore50_0_dr_ste_htbl_alloc in dr_ste.c.o\n+rdmacore50_0_dr_ste_create_next_htbl in dr_ste.c.o\n+rdmacore50_0_dr_ste_htbl_free in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_actions_tx in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_actions_rx in dr_ste.c.o\n+rdmacore50_0_dr_ste_conv_modify_hdr_sw_field in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_action_set in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_action_add in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_action_copy in dr_ste.c.o\n+rdmacore50_0_dr_ste_set_action_decap_l3_list in dr_ste.c.o\n+rdmacore50_0_dr_ste_alloc_modify_hdr in dr_ste.c.o\n+rdmacore50_0_dr_ste_free_modify_hdr in dr_ste.c.o\n+rdmacore50_0_dr_ste_alloc_encap in dr_ste.c.o\n+rdmacore50_0_dr_ste_free_encap in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_pre_check in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_ste_arr in dr_ste.c.o\n+rdmacore50_0_dr_ste_copy_param in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l2_src_dst in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l3_ipv6_dst in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l3_ipv6_src in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l3_ipv4_5_tuple in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l2_src in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l2_dst in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l2_tnl in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l3_ipv4_misc in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_ipv6_l3_l4 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_empty_always_hit in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_mpls in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_gre in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_mpls_over_gre in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_mpls_over_udp in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt_exist in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_icmp in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_general_purpose in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_eth_l4_misc in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_vxlan_gpe in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_geneve in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_gtpu in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_0 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_1 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_register_0 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_register_1 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_src_gvmi_qpn in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_flex_parser_0 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_flex_parser_1 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_tunnel_header in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_ib_l4 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def0 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def2 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def6 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def16 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def22 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def24 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def25 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def26 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def28 in dr_ste.c.o\n+rdmacore50_0_dr_ste_build_def33 in dr_ste.c.o\n+rdmacore50_0_dr_ste_get_ctx in dr_ste.c.o\n+mlx5dv_dr_aso_other_domain_link in dr_ste.c.o\n+mlx5dv_dr_aso_other_domain_unlink in dr_ste.c.o\n+rdmacore50_0_dr_send_fill_and_append_ste_send_info in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_ste in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_htbl in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_formated_htbl in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_action in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_pattern in dr_send.c.o\n+rdmacore50_0_dr_send_postsend_args in dr_send.c.o\n+rdmacore50_0_dr_send_allow_fl in dr_send.c.o\n+rdmacore50_0_dr_send_ring_free in dr_send.c.o\n+rdmacore50_0_dr_send_ring_alloc in dr_send.c.o\n+rdmacore50_0_dr_send_ring_force_drain in dr_send.c.o\n+rdmacore50_0_dr_ste_v1_set_aso_ct in dr_ste_v1.c.o\n+rdmacore50_0_dr_ste_get_ctx_v1 in dr_ste_v1.c.o\n+rdmacore50_0_dr_actions_build_ste_arr in dr_action.c.o\n+rdmacore50_0_dr_actions_build_attr in dr_action.c.o\n+mlx5dv_dr_action_create_drop in dr_action.c.o\n+mlx5dv_dr_action_create_default_miss in dr_action.c.o\n+mlx5dv_dr_action_create_dest_ibv_qp in dr_action.c.o\n+mlx5dv_dr_action_create_dest_devx_tir in dr_action.c.o\n+mlx5dv_dr_action_create_dest_table in dr_action.c.o\n+mlx5dv_dr_action_create_dest_root_table in dr_action.c.o\n+mlx5dv_dr_action_create_flow_counter in dr_action.c.o\n+mlx5dv_dr_action_create_aso in dr_action.c.o\n+mlx5dv_dr_action_modify_aso in dr_action.c.o\n+mlx5dv_dr_action_create_tag in dr_action.c.o\n+mlx5dv_dr_action_create_packet_reformat in dr_action.c.o\n+mlx5dv_dr_action_create_pop_vlan in dr_action.c.o\n+mlx5dv_dr_action_create_push_vlan in dr_action.c.o\n+rdmacore50_0_dr_actions_reformat_get_id in dr_action.c.o\n+mlx5dv_dr_action_create_modify_header in dr_action.c.o\n+mlx5dv_dr_action_modify_flow_meter in dr_action.c.o\n+mlx5dv_dr_action_create_flow_meter in dr_action.c.o\n+mlx5dv_dr_action_create_dest_vport in dr_action.c.o\n+mlx5dv_dr_action_create_dest_ib_port in dr_action.c.o\n+mlx5dv_dr_action_create_dest_array in dr_action.c.o\n+mlx5dv_dr_action_destroy in dr_action.c.o\n+mlx5dv_dr_action_create_flow_sampler in dr_action.c.o\n+rdmacore50_0_mlx5_stall_cq_poll_min in cq.c.o\n+rdmacore50_0_mlx5_stall_cq_dec_step in cq.c.o\n+rdmacore50_0_mlx5_stall_cq_poll_max in cq.c.o\n+rdmacore50_0_mlx5_stall_cq_inc_step in cq.c.o\n+rdmacore50_0_mlx5_stall_num_loop in cq.c.o\n+rdmacore50_0_mlx5_poll_cq in cq.c.o\n+rdmacore50_0_mlx5_poll_cq_v1 in cq.c.o\n+rdmacore50_0_mlx5_cq_fill_pfns in cq.c.o\n+rdmacore50_0_mlx5_arm_cq in cq.c.o\n+rdmacore50_0_mlx5_cq_event in cq.c.o\n+rdmacore50_0___mlx5_cq_clean in cq.c.o\n+rdmacore50_0_mlx5_cq_clean in cq.c.o\n+rdmacore50_0_mlx5_cq_resize_copy_cqes in cq.c.o\n+rdmacore50_0_mlx5_alloc_cq_buf in cq.c.o\n+rdmacore50_0_mlx5_free_cq_buf in cq.c.o\n+rdmacore50_0_dr_devx_query_esw_vport_context in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_gvmi in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_esw_caps in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_device in dr_devx.c.o\n+rdmacore50_0_dr_devx_sync_steering in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_flow_table in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_flow_table in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_always_hit_ft in dr_devx.c.o\n+rdmacore50_0_dr_devx_destroy_always_hit_ft in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_flow_sampler in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_flow_sampler in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_definer in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_reformat_ctx in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_meter in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_meter in dr_devx.c.o\n+rdmacore50_0_dr_devx_modify_meter in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_qp in dr_devx.c.o\n+rdmacore50_0_dr_devx_modify_qp_rst2init in dr_devx.c.o\n+rdmacore50_0_dr_devx_modify_qp_init2rtr in dr_devx.c.o\n+rdmacore50_0_dr_devx_modify_qp_rtr2rts in dr_devx.c.o\n+rdmacore50_0_dr_devx_query_gid in dr_devx.c.o\n+rdmacore50_0_dr_devx_create_modify_header_arg in dr_devx.c.o\n+rdmacore50_0_dr_ste_get_ctx_v2 in dr_ste_v2.c.o\n+mlx5dv_dr_table_create in dr_table.c.o\n+mlx5dv_dr_table_destroy in dr_table.c.o\n+rdmacore50_0_dr_crc32_init_table in dr_crc32.c.o\n+rdmacore50_0_dr_crc32_slice8_calc in dr_crc32.c.o\n+rdmacore50_0_dr_domain_is_support_sw_encap in dr_domain.c.o\n+rdmacore50_0_dr_domain_is_support_modify_hdr_cache in dr_domain.c.o\n+rdmacore50_0_dr_domain_is_support_ste_icm_size in dr_domain.c.o\n+rdmacore50_0_dr_domain_set_max_ste_icm_size in dr_domain.c.o\n+mlx5dv_dr_domain_create in dr_domain.c.o\n+mlx5dv_dr_domain_sync in dr_domain.c.o\n+mlx5dv_dr_domain_set_reclaim_device_memory in dr_domain.c.o\n+mlx5dv_dr_domain_allow_duplicate_rules in dr_domain.c.o\n+mlx5dv_dr_domain_destroy in dr_domain.c.o\n+mlx5dv_dr_matcher_set_layout in dr_matcher.c.o\n+mlx5dv_dr_matcher_create in dr_matcher.c.o\n+mlx5dv_dr_matcher_destroy in dr_matcher.c.o\n+rdmacore50_0_dr_icm_pool_sync_pool in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_alloc_chunk in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_free_chunk in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_get_chunk_icm_addr in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_get_chunk_mr_addr in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_get_chunk_rkey in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_create in dr_icm_pool.c.o\n+rdmacore50_0_dr_icm_pool_destroy in dr_icm_pool.c.o\n+rdmacore50_0_dr_ptrn_sync_pool in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_cache_get_pattern in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_cache_put_pattern in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_mngr_create in dr_ptrn.c.o\n+rdmacore50_0_dr_ptrn_mngr_destroy in dr_ptrn.c.o\n+rdmacore50_0_dr_ste_get_ctx_v0 in dr_ste_v0.c.o\n+rdmacore50_0_mlx5_copy_to_recv_srq in srq.c.o\n+rdmacore50_0_mlx5_free_srq_wqe in srq.c.o\n+rdmacore50_0_srq_cooldown_wqe in srq.c.o\n+rdmacore50_0_mlx5_complete_odp_fault in srq.c.o\n+rdmacore50_0_mlx5_post_srq_recv in srq.c.o\n+rdmacore50_0_mlx5_alloc_srq_buf in srq.c.o\n+rdmacore50_0_mlx5_find_srq in srq.c.o\n+rdmacore50_0_mlx5_store_srq in srq.c.o\n+rdmacore50_0_mlx5_clear_srq in srq.c.o\n+rdmacore50_0_dr_buddy_init in dr_buddy.c.o\n+rdmacore50_0_dr_buddy_cleanup in dr_buddy.c.o\n+rdmacore50_0_dr_buddy_alloc_mem in dr_buddy.c.o\n+rdmacore50_0_dr_buddy_free_mem in dr_buddy.c.o\n+rdmacore50_0_dr_vports_table_get_vport_cap in dr_vports.c.o\n+rdmacore50_0_dr_vports_table_get_ib_port_cap in dr_vports.c.o\n+rdmacore50_0_dr_vports_table_add_wire in dr_vports.c.o\n+rdmacore50_0_dr_vports_table_del_wire in dr_vports.c.o\n+rdmacore50_0_dr_vports_table_create in dr_vports.c.o\n+rdmacore50_0_dr_vports_table_destroy in dr_vports.c.o\n+mlx5dv_vfio_get_events_fd in mlx5_vfio.c.o\n+mlx5dv_vfio_process_events in mlx5_vfio.c.o\n+mlx5dv_get_vfio_device_list in mlx5_vfio.c.o\n+rdmacore50_0_is_mlx5_vfio_dev in mlx5_vfio.c.o\n+rdmacore50_0_mlx5_free_buf_extern in buf.c.o\n+rdmacore50_0_mlx5_alloc_buf_extern in buf.c.o\n+rdmacore50_0_mlx5_free_actual_buf in buf.c.o\n+rdmacore50_0_mlx5_is_custom_alloc in buf.c.o\n+rdmacore50_0_mlx5_is_extern_alloc in buf.c.o\n+rdmacore50_0_mlx5_get_alloc_type in buf.c.o\n+rdmacore50_0_mlx5_alloc_buf_contig in buf.c.o\n+rdmacore50_0_mlx5_alloc_prefered_buf in buf.c.o\n+rdmacore50_0_mlx5_free_buf_contig in buf.c.o\n+rdmacore50_0_mlx5_alloc_buf in buf.c.o\n+rdmacore50_0_mlx5_free_buf in buf.c.o\n+mlx5dv_dump_dr_domain in dr_dbg.c.o\n+mlx5dv_dump_dr_table in dr_dbg.c.o\n+mlx5dv_dump_dr_matcher in dr_dbg.c.o\n+mlx5dv_dump_dr_rule in dr_dbg.c.o\n+rdmacore50_0_dr_arg_get_object_id in dr_arg.c.o\n+rdmacore50_0_dr_arg_get_obj in dr_arg.c.o\n+rdmacore50_0_dr_arg_put_obj in dr_arg.c.o\n+rdmacore50_0_dr_arg_mngr_create in dr_arg.c.o\n+rdmacore50_0_dr_arg_mngr_destroy in dr_arg.c.o\n \n dbrec.c.o:\n U free\n U malloc\n U memset\n 0000000000000000 t mlx5_alloc_dbrec.cold\n 000000000000000a t mlx5_free_db.cold\n@@ -687,815 +449,14 @@\n 0000000000000000 T rdmacore50_0_mlx5_alloc_dbrec\n U rdmacore50_0_mlx5_free_buf\n U rdmacore50_0_mlx5_free_buf_extern\n 0000000000000260 T rdmacore50_0_mlx5_free_db\n U rdmacore50_0_mlx5_is_custom_alloc\n U rdmacore50_0_mlx5_is_extern_alloc\n \n-dr_buddy.c.o:\n- U __errno_location\n- U calloc\n- U free\n- U rdmacore50_0_bitmap_find_first_bit\n-0000000000000250 T rdmacore50_0_dr_buddy_alloc_mem\n-00000000000001e0 T rdmacore50_0_dr_buddy_cleanup\n-0000000000000400 T rdmacore50_0_dr_buddy_free_mem\n-0000000000000000 T rdmacore50_0_dr_buddy_init\n-\n-dr_ste.c.o:\n-0000000000000000 r .LC0\n- U __errno_location\n- U __memcpy_chk\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_ste_build_empty_always_hit_tag\n-0000000000000010 t dr_ste_copy_mask_spec\n-0000000000000000 t dr_ste_free.cold\n- U free\n- U memcmp\n- U memcpy\n-0000000000003470 T mlx5dv_dr_aso_other_domain_link\n-00000000000034b0 T mlx5dv_dr_aso_other_domain_unlink\n- U rdmacore50_0_dr_crc32_slice8_calc\n- U rdmacore50_0_dr_icm_alloc_chunk\n- U rdmacore50_0_dr_icm_free_chunk\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n- U rdmacore50_0_dr_rule_set_last_member\n- U rdmacore50_0_dr_send_fill_and_append_ste_send_info\n- U rdmacore50_0_dr_send_postsend_action\n- U rdmacore50_0_dr_send_postsend_formated_htbl\n- U rdmacore50_0_dr_send_postsend_ste\n-0000000000001620 T rdmacore50_0_dr_ste_alloc_encap\n-0000000000001530 T rdmacore50_0_dr_ste_alloc_modify_hdr\n-00000000000030e0 T rdmacore50_0_dr_ste_build_def0\n-00000000000031e0 T rdmacore50_0_dr_ste_build_def16\n-0000000000003130 T rdmacore50_0_dr_ste_build_def2\n-0000000000003240 T rdmacore50_0_dr_ste_build_def22\n-0000000000003290 T rdmacore50_0_dr_ste_build_def24\n-00000000000032e0 T rdmacore50_0_dr_ste_build_def25\n-0000000000003330 T rdmacore50_0_dr_ste_build_def26\n-0000000000003380 T rdmacore50_0_dr_ste_build_def28\n-00000000000033d0 T rdmacore50_0_dr_ste_build_def33\n-0000000000003190 T rdmacore50_0_dr_ste_build_def6\n-0000000000002de0 T rdmacore50_0_dr_ste_build_empty_always_hit\n-0000000000002dc0 T rdmacore50_0_dr_ste_build_eth_ipv6_l3_l4\n-0000000000002d60 T rdmacore50_0_dr_ste_build_eth_l2_dst\n-0000000000002d40 T rdmacore50_0_dr_ste_build_eth_l2_src\n-0000000000002cc0 T rdmacore50_0_dr_ste_build_eth_l2_src_dst\n-0000000000002d80 T rdmacore50_0_dr_ste_build_eth_l2_tnl\n-0000000000002d20 T rdmacore50_0_dr_ste_build_eth_l3_ipv4_5_tuple\n-0000000000002da0 T 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T rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n-0000000000002e30 T rdmacore50_0_dr_ste_build_tnl_gre\n-0000000000002f90 T rdmacore50_0_dr_ste_build_tnl_gtpu\n-0000000000002fb0 T rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_0\n-0000000000002fd0 T rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_1\n-0000000000002e50 T rdmacore50_0_dr_ste_build_tnl_mpls_over_gre\n-0000000000002e70 T rdmacore50_0_dr_ste_build_tnl_mpls_over_udp\n-0000000000002f30 T rdmacore50_0_dr_ste_build_tnl_vxlan_gpe\n-0000000000003090 T rdmacore50_0_dr_ste_build_tunnel_header\n-0000000000000540 T rdmacore50_0_dr_ste_calc_hash_index\n-00000000000006a0 T rdmacore50_0_dr_ste_conv_bit_to_byte_mask\n-0000000000001420 T rdmacore50_0_dr_ste_conv_modify_hdr_sw_field\n-0000000000001920 T rdmacore50_0_dr_ste_copy_param\n-0000000000001200 T rdmacore50_0_dr_ste_create_next_htbl\n-00000000000008a0 T rdmacore50_0_dr_ste_equal_tag\n-00000000000009f0 T rdmacore50_0_dr_ste_free\n-00000000000016d0 T rdmacore50_0_dr_ste_free_encap\n-00000000000015f0 T rdmacore50_0_dr_ste_free_modify_hdr\n-0000000000003420 T rdmacore50_0_dr_ste_get_ctx\n- U rdmacore50_0_dr_ste_get_ctx_v0\n- U rdmacore50_0_dr_ste_get_ctx_v1\n- U rdmacore50_0_dr_ste_get_ctx_v2\n-00000000000007e0 T rdmacore50_0_dr_ste_get_icm_addr\n-0000000000000820 T rdmacore50_0_dr_ste_get_miss_list\n-0000000000000840 T rdmacore50_0_dr_ste_get_miss_list_top\n-0000000000000800 T rdmacore50_0_dr_ste_get_mr_addr\n-00000000000010c0 T rdmacore50_0_dr_ste_htbl_alloc\n-00000000000013b0 T rdmacore50_0_dr_ste_htbl_free\n-0000000000000f90 T rdmacore50_0_dr_ste_htbl_init_and_postsend\n-0000000000000890 T rdmacore50_0_dr_ste_is_last_in_rule\n-0000000000000910 T rdmacore50_0_dr_ste_prepare_for_postsend\n-0000000000001470 T rdmacore50_0_dr_ste_set_action_add\n-00000000000014a0 T rdmacore50_0_dr_ste_set_action_copy\n-00000000000014e0 T rdmacore50_0_dr_ste_set_action_decap_l3_list\n-0000000000001440 T rdmacore50_0_dr_ste_set_action_set\n-0000000000001400 T rdmacore50_0_dr_ste_set_actions_rx\n-00000000000013e0 T rdmacore50_0_dr_ste_set_actions_tx\n-0000000000000760 T rdmacore50_0_dr_ste_set_bit_mask\n-0000000000000940 T rdmacore50_0_dr_ste_set_formated_ste\n-00000000000007a0 T rdmacore50_0_dr_ste_set_hit_addr\n-00000000000008d0 T rdmacore50_0_dr_ste_set_hit_addr_by_next_htbl\n-00000000000007c0 T rdmacore50_0_dr_ste_set_hit_gvmi\n-0000000000000780 T rdmacore50_0_dr_ste_set_miss_addr\n-\n-dr_matcher.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_mask_is_tnl_gtpu_flex_parser_0\n-00000000000000a0 t dr_mask_is_tnl_gtpu_flex_parser_1\n-0000000000002350 t dr_matcher_connect\n-0000000000000140 t dr_matcher_copy_mask\n-00000000000024d0 t dr_matcher_init_nic\n-0000000000000460 t dr_matcher_is_mask_consumed\n-00000000000002f0 t dr_matcher_set_nic_matcher_layout\n-00000000000005d0 t dr_matcher_set_ste_builders\n-00000000000025c0 t dr_matcher_uninit_nic\n- U free\n- U memcmp\n- U memcpy\n- U mlx5dv_create_flow_matcher\n- U mlx5dv_destroy_flow_matcher\n- U mlx5dv_devx_obj_destroy\n-0000000000002710 T mlx5dv_dr_matcher_create\n-0000000000002e60 T mlx5dv_dr_matcher_destroy\n-0000000000002660 T mlx5dv_dr_matcher_set_layout\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_devx_create_definer\n- U rdmacore50_0_dr_domain_is_support_ste_icm_size\n- U rdmacore50_0_dr_domain_set_max_ste_icm_size\n- U rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n- U rdmacore50_0_dr_rule_rehash_matcher_s_anchor\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_dr_ste_build_def0\n- U rdmacore50_0_dr_ste_build_def16\n- U rdmacore50_0_dr_ste_build_def2\n- U rdmacore50_0_dr_ste_build_def22\n- U rdmacore50_0_dr_ste_build_def24\n- U rdmacore50_0_dr_ste_build_def25\n- U rdmacore50_0_dr_ste_build_def26\n- U rdmacore50_0_dr_ste_build_def28\n- U rdmacore50_0_dr_ste_build_def33\n- U rdmacore50_0_dr_ste_build_def6\n- U rdmacore50_0_dr_ste_build_empty_always_hit\n- U rdmacore50_0_dr_ste_build_eth_ipv6_l3_l4\n- U rdmacore50_0_dr_ste_build_eth_l2_dst\n- U rdmacore50_0_dr_ste_build_eth_l2_src\n- U rdmacore50_0_dr_ste_build_eth_l2_src_dst\n- U rdmacore50_0_dr_ste_build_eth_l2_tnl\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv4_5_tuple\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv4_misc\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv6_dst\n- U rdmacore50_0_dr_ste_build_eth_l3_ipv6_src\n- U rdmacore50_0_dr_ste_build_eth_l4_misc\n- U rdmacore50_0_dr_ste_build_flex_parser_0\n- U rdmacore50_0_dr_ste_build_flex_parser_1\n- U rdmacore50_0_dr_ste_build_general_purpose\n- U rdmacore50_0_dr_ste_build_ib_l4\n- U rdmacore50_0_dr_ste_build_icmp\n- U rdmacore50_0_dr_ste_build_mpls\n- U rdmacore50_0_dr_ste_build_pre_check\n- U rdmacore50_0_dr_ste_build_register_0\n- U rdmacore50_0_dr_ste_build_register_1\n- U rdmacore50_0_dr_ste_build_src_gvmi_qpn\n- U rdmacore50_0_dr_ste_build_tnl_geneve\n- U rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt\n- U rdmacore50_0_dr_ste_build_tnl_geneve_tlv_opt_exist\n- U rdmacore50_0_dr_ste_build_tnl_gre\n- U rdmacore50_0_dr_ste_build_tnl_gtpu\n- U rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_0\n- U rdmacore50_0_dr_ste_build_tnl_gtpu_flex_parser_1\n- U rdmacore50_0_dr_ste_build_tnl_mpls_over_gre\n- U rdmacore50_0_dr_ste_build_tnl_mpls_over_udp\n- U rdmacore50_0_dr_ste_build_tnl_vxlan_gpe\n- U rdmacore50_0_dr_ste_build_tunnel_header\n- U rdmacore50_0_dr_ste_copy_param\n- U rdmacore50_0_dr_ste_htbl_alloc\n- U rdmacore50_0_dr_ste_htbl_free\n- U rdmacore50_0_dr_ste_htbl_init_and_postsend\n-\n-dr_icm_pool.c.o:\n-0000000000000000 r .LC0\n-0000000000000008 r .LC1\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_icm_buddy_destroy\n-0000000000000160 t dr_icm_pool_sync_pool_buddies\n- U free\n- U ibv_dereg_mr\n- U malloc\n- U memset\n- U mlx5dv_alloc_dm\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_buddy_alloc_mem\n- U rdmacore50_0_dr_buddy_cleanup\n- U rdmacore50_0_dr_buddy_free_mem\n- U rdmacore50_0_dr_buddy_init\n- U rdmacore50_0_dr_devx_sync_steering\n-00000000000003f0 T rdmacore50_0_dr_icm_alloc_chunk\n-0000000000000a90 T rdmacore50_0_dr_icm_free_chunk\n-0000000000000c00 T rdmacore50_0_dr_icm_pool_create\n-0000000000000d40 T rdmacore50_0_dr_icm_pool_destroy\n-0000000000000b50 T rdmacore50_0_dr_icm_pool_get_chunk_icm_addr\n-0000000000000ba0 T rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n-0000000000000be0 T rdmacore50_0_dr_icm_pool_get_chunk_rkey\n-0000000000000b20 T rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz\n-00000000000003a0 T rdmacore50_0_dr_icm_pool_sync_pool\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_mlx5_free_dm\n-\n-cq.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000000 r .LC2\n-0000000000000090 r .LC3\n-0000000000000015 r .LC4\n-0000000000000032 r .LC6\n-00000000000000b8 r .LC7\n-0000000000000050 r .LC8\n-0000000000000058 r .LC9\n-0000000000000980 r CSWTCH.108\n-0000000000000590 t __mlx5_cq_clean.part.0\n- U __stack_chk_fail\n- U __vfprintf_chk\n- U abort\n-00000000000004f0 t dump_cqe\n- U fwrite\n-0000000000000bf0 t handle_tag_matching\n- U memcpy\n- U memset\n-0000000000000910 t mlx5_cq_read_flow_tag\n-0000000000000350 t mlx5_cq_read_wc_byte_len\n-0000000000000230 t mlx5_cq_read_wc_completion_ts\n-0000000000000250 t mlx5_cq_read_wc_completion_wallclock_ns\n-0000000000000550 t mlx5_cq_read_wc_cvlan\n-0000000000000030 t mlx5_cq_read_wc_dlid_path_bits\n-0000000000000370 t mlx5_cq_read_wc_flags\n-0000000000000330 t mlx5_cq_read_wc_imm_data\n-0000000000000100 t mlx5_cq_read_wc_opcode\n-0000000000000310 t mlx5_cq_read_wc_qp_num\n-0000000000000010 t mlx5_cq_read_wc_sl\n-0000000000000570 t mlx5_cq_read_wc_slid\n-00000000000002f0 t mlx5_cq_read_wc_src_qp\n-00000000000002d0 t mlx5_cq_read_wc_tm_info\n-0000000000000000 t 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pthread_mutex_unlock\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000016220 T rdmacore50_0___mlx5_cq_clean\n-0000000000016610 T rdmacore50_0_mlx5_alloc_cq_buf\n- U rdmacore50_0_mlx5_alloc_prefered_buf\n-00000000000161a0 T rdmacore50_0_mlx5_arm_cq\n- U rdmacore50_0_mlx5_complete_odp_fault\n- U rdmacore50_0_mlx5_copy_to_recv_srq\n- U rdmacore50_0_mlx5_copy_to_recv_wqe\n- U rdmacore50_0_mlx5_copy_to_send_wqe\n-0000000000016250 T rdmacore50_0_mlx5_cq_clean\n-0000000000016210 T rdmacore50_0_mlx5_cq_event\n-0000000000015fa0 T rdmacore50_0_mlx5_cq_fill_pfns\n-0000000000016310 T rdmacore50_0_mlx5_cq_resize_copy_cqes\n- U rdmacore50_0_mlx5_find_mkey\n- U rdmacore50_0_mlx5_find_qp\n- U rdmacore50_0_mlx5_find_srq\n- U rdmacore50_0_mlx5_free_actual_buf\n-0000000000016780 T rdmacore50_0_mlx5_free_cq_buf\n- U rdmacore50_0_mlx5_free_srq_wqe\n- U rdmacore50_0_mlx5_freeze_on_error_cqe\n- U rdmacore50_0_mlx5_get_alloc_type\n-0000000000014360 T rdmacore50_0_mlx5_poll_cq\n-0000000000015100 T rdmacore50_0_mlx5_poll_cq_v1\n-0000000000000000 D rdmacore50_0_mlx5_stall_cq_dec_step\n-0000000000000004 D rdmacore50_0_mlx5_stall_cq_inc_step\n-0000000000000008 D rdmacore50_0_mlx5_stall_cq_poll_max\n-000000000000000c D rdmacore50_0_mlx5_stall_cq_poll_min\n-0000000000000010 D rdmacore50_0_mlx5_stall_num_loop\n- U rdmacore50_0_mlx5_use_huge\n- U sleep\n- U stderr\n-\n-dr_dbg.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000070 r .LC10\n-0000000000000058 r .LC11\n-000000000000008a r .LC12\n-00000000000000a2 r .LC13\n-00000000000000b5 r .LC14\n-00000000000000ba r .LC15\n-00000000000000ca r .LC16\n-00000000000000e5 r .LC17\n-00000000000000fa r .LC18\n-0000000000000080 r .LC19\n-0000000000000005 r .LC2\n-0000000000000110 r .LC20\n-0000000000000112 r .LC21\n-00000000000000a8 r .LC22\n-00000000000000d0 r .LC23\n-0000000000000100 r .LC24\n-000000000000011c r .LC25\n-0000000000000132 r .LC26\n-000000000000013c r .LC27\n-0000000000000140 r .LC28\n-0000000000000142 r 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dr_ste_v0_set_next_lu_type\n- U rdmacore50_0_dr_ste_conv_bit_to_byte_mask\n-00000000000041a0 T rdmacore50_0_dr_ste_get_ctx_v0\n- U rdmacore50_0_dr_vports_table_get_vport_cap\n-0000000000000000 d ste_ctx_v0\n-\n dr_rule.c.o:\n 0000000000000000 r .LC0\n U __errno_location\n U __memcpy_chk\n U __stack_chk_fail\n U calloc\n 0000000000000000 t dr_rule_clean_rule_members\n@@ -1533,228 +494,14 @@\n U rdmacore50_0_dr_ste_set_bit_mask\n U rdmacore50_0_dr_ste_set_formated_ste\n U rdmacore50_0_dr_ste_set_hit_addr\n U rdmacore50_0_dr_ste_set_hit_addr_by_next_htbl\n U rdmacore50_0_dr_ste_set_hit_gvmi\n U rdmacore50_0_dr_ste_set_miss_addr\n \n-dr_send.c.o:\n-0000000000000000 r .LC0\n-0000000000000008 r .LC1\n-0000000000000010 r .LC2\n-0000000000000018 r .LC3\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-00000000000002a0 t dr_postsend_icm_data\n-0000000000000000 t dr_rdma_segments\n- U free\n- U ibv_create_cq\n- U ibv_dereg_mr\n- U ibv_destroy_cq\n- U ibv_reg_mr\n- U malloc\n- U memcpy\n- U memset\n- U mlx5dv_devx_obj_destroy\n- U mlx5dv_devx_umem_dereg\n- U mlx5dv_devx_umem_reg\n- U mlx5dv_init_obj\n- U posix_memalign\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_devx_create_qp\n- U rdmacore50_0_dr_devx_modify_qp_init2rtr\n- U rdmacore50_0_dr_devx_modify_qp_rst2init\n- U rdmacore50_0_dr_devx_modify_qp_rtr2rts\n- U rdmacore50_0_dr_devx_query_gid\n- U rdmacore50_0_dr_icm_pool_get_chunk_mr_addr\n- U rdmacore50_0_dr_icm_pool_get_chunk_rkey\n-0000000000001310 T rdmacore50_0_dr_send_allow_fl\n-0000000000000670 T rdmacore50_0_dr_send_fill_and_append_ste_send_info\n-0000000000001040 T rdmacore50_0_dr_send_postsend_action\n-0000000000001220 T rdmacore50_0_dr_send_postsend_args\n-0000000000000d60 T rdmacore50_0_dr_send_postsend_formated_htbl\n-00000000000007b0 T rdmacore50_0_dr_send_postsend_htbl\n-0000000000001140 T rdmacore50_0_dr_send_postsend_pattern\n-00000000000006e0 T rdmacore50_0_dr_send_postsend_ste\n-0000000000001410 T rdmacore50_0_dr_send_ring_alloc\n-0000000000001d50 T rdmacore50_0_dr_send_ring_force_drain\n-0000000000001330 T rdmacore50_0_dr_send_ring_free\n- U rdmacore50_0_dr_ste_get_mr_addr\n- U rdmacore50_0_dr_ste_prepare_for_postsend\n- U sysconf\n-\n-qp.c.o:\n-0000000000000000 r .LC0\n-0000000000000090 r .LC3\n-0000000000000000 r .LC4\n-0000000000000000 r .LC5\n-0000000000000158 r CSWTCH.171\n-0000000000000140 r CSWTCH.180\n- U __errno_location\n- U __stack_chk_fail\n- U __vfprintf_chk\n-00000000000073c0 t _mlx5_post_send\n- U abort\n-0000000000000164 r bs_selector.0\n- U calloc\n- U free\n- U fwrite\n- U getenv\n- U ibv_qp_to_qp_ex\n- U memcpy\n- U memset\n-0000000000000390 t mlx5_err\n-0000000000000180 r mlx5_ib_opcode\n-0000000000000500 t mlx5_qp_query_sqd\n-00000000000004b0 t mlx5_send_wr_abort\n-0000000000003bd0 t mlx5_send_wr_atomic_cmp_swp\n-0000000000003910 t mlx5_send_wr_atomic_fetch_add\n-0000000000004ab0 t mlx5_send_wr_bind_mw\n-0000000000001170 t mlx5_send_wr_complete\n-0000000000000450 t mlx5_send_wr_complete_error\n-0000000000004f30 t mlx5_send_wr_local_inv\n-00000000000063e0 t mlx5_send_wr_mkey_configure\n-00000000000069c0 t mlx5_send_wr_mr_interleaved\n-0000000000006e30 t mlx5_send_wr_mr_list\n-0000000000002f40 t mlx5_send_wr_rdma_read\n-00000000000031b0 t mlx5_send_wr_rdma_write\n-0000000000003680 t mlx5_send_wr_rdma_write_imm\n-0000000000004260 t mlx5_send_wr_send_eth\n-0000000000002ce0 t mlx5_send_wr_send_imm\n-0000000000003420 t mlx5_send_wr_send_inv\n-0000000000002a80 t mlx5_send_wr_send_other\n-00000000000047b0 t mlx5_send_wr_send_tso\n-0000000000001f50 t mlx5_send_wr_set_dc_addr\n-0000000000002070 t mlx5_send_wr_set_dc_addr_stream\n-0000000000001620 t mlx5_send_wr_set_inline_data_eth\n-00000000000024b0 t mlx5_send_wr_set_inline_data_list_eth\n-0000000000000f50 t mlx5_send_wr_set_inline_data_list_rc_uc\n-0000000000002860 t mlx5_send_wr_set_inline_data_list_ud_xrc_dc\n-0000000000000db0 t mlx5_send_wr_set_inline_data_rc_uc\n-0000000000002300 t mlx5_send_wr_set_inline_data_ud_xrc_dc\n-0000000000006320 t mlx5_send_wr_set_mkey_access_flags\n-0000000000005d90 t mlx5_send_wr_set_mkey_crypto\n-0000000000006000 t mlx5_send_wr_set_mkey_layout\n-0000000000006310 t mlx5_send_wr_set_mkey_layout_interleaved\n-00000000000067d0 t mlx5_send_wr_set_mkey_layout_list\n-0000000000005e40 t mlx5_send_wr_set_mkey_sig_block\n-00000000000013b0 t mlx5_send_wr_set_sge_eth\n-0000000000001920 t mlx5_send_wr_set_sge_list_eth\n-0000000000000c40 t mlx5_send_wr_set_sge_list_rc_uc\n-0000000000002190 t mlx5_send_wr_set_sge_list_ud_xrc_dc\n-0000000000000b40 t mlx5_send_wr_set_sge_rc_uc\n-0000000000001e50 t mlx5_send_wr_set_sge_ud_xrc_dc\n-0000000000001d40 t mlx5_send_wr_set_ud_addr\n-0000000000001c50 t mlx5_send_wr_set_xrc_srqn\n-0000000000000670 t mlx5_send_wr_start\n-0000000000000710 t mlx5_umr_fill_sig_bsf\n-00000000000044c0 t mlx5_umr_set_psv\n-00000000000005f0 t mlx5_validate_sig_block_domain\n-0000000000000000 t mlx5_wr_memcpy\n-0000000000003ea0 t mlx5_wr_raw_wqe\n- U mlx5dv_devx_qp_query\n-000000000000a520 T mlx5dv_qp_cancel_posted_send_wrs\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-0000000000009270 T rdmacore50_0_mlx5_bind_mw\n-000000000000a4e0 T rdmacore50_0_mlx5_clear_qp\n-0000000000008900 T rdmacore50_0_mlx5_copy_to_recv_wqe\n-0000000000008a00 T rdmacore50_0_mlx5_copy_to_send_wqe\n-000000000000a430 T rdmacore50_0_mlx5_find_qp\n-0000000000008cd0 T rdmacore50_0_mlx5_get_atomic_laddr\n- U rdmacore50_0_mlx5_get_cmd_status_err\n-0000000000008c70 T rdmacore50_0_mlx5_get_send_wqe\n-0000000000008ca0 T rdmacore50_0_mlx5_init_qp_indices\n-0000000000008c90 T rdmacore50_0_mlx5_init_rwq_indices\n-0000000000009750 T rdmacore50_0_mlx5_post_recv\n-0000000000008d00 T rdmacore50_0_mlx5_post_send\n-0000000000009b50 T rdmacore50_0_mlx5_post_srq_ops\n-0000000000009380 T rdmacore50_0_mlx5_post_wq_recv\n-0000000000008d10 T rdmacore50_0_mlx5_qp_fill_wr_complete_error\n-0000000000008d30 T rdmacore50_0_mlx5_qp_fill_wr_complete_real\n-0000000000008d50 T rdmacore50_0_mlx5_qp_fill_wr_pfns\n-000000000000a460 T rdmacore50_0_mlx5_store_qp\n-000000000000a3f0 T rdmacore50_0_mlx5_use_huge\n- U stderr\n-0000000000005230 t umr_wqe_finalize\n-\n-dr_domain.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n- U free\n- U ibv_alloc_pd\n- U ibv_dealloc_pd\n- U ibv_get_device_name\n- U ibv_query_device\n- U ibv_query_port\n- U mlx5dv_devx_alloc_uar\n- U mlx5dv_devx_free_uar\n-0000000000000c70 T mlx5dv_dr_domain_allow_duplicate_rules\n-00000000000000a0 T mlx5dv_dr_domain_create\n-0000000000000d40 T mlx5dv_dr_domain_destroy\n-0000000000000ba0 T mlx5dv_dr_domain_set_reclaim_device_memory\n-0000000000000ac0 T mlx5dv_dr_domain_sync\n- U mlx5dv_init_obj\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_dr_arg_mngr_create\n- U rdmacore50_0_dr_arg_mngr_destroy\n- U rdmacore50_0_dr_crc32_init_table\n- U rdmacore50_0_dr_devx_query_device\n- U rdmacore50_0_dr_devx_query_esw_caps\n- U rdmacore50_0_dr_devx_query_esw_vport_context\n- U rdmacore50_0_dr_devx_sync_steering\n-0000000000000010 T rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n-0000000000000030 T rdmacore50_0_dr_domain_is_support_ste_icm_size\n-0000000000000000 T rdmacore50_0_dr_domain_is_support_sw_encap\n-0000000000000050 T rdmacore50_0_dr_domain_set_max_ste_icm_size\n- U rdmacore50_0_dr_icm_pool_create\n- U rdmacore50_0_dr_icm_pool_destroy\n- U rdmacore50_0_dr_icm_pool_set_pool_max_log_chunk_sz\n- U rdmacore50_0_dr_icm_pool_sync_pool\n- U rdmacore50_0_dr_ptrn_mngr_create\n- U rdmacore50_0_dr_ptrn_mngr_destroy\n- U rdmacore50_0_dr_ptrn_sync_pool\n- U rdmacore50_0_dr_send_allow_fl\n- U rdmacore50_0_dr_send_ring_alloc\n- U rdmacore50_0_dr_send_ring_force_drain\n- U rdmacore50_0_dr_send_ring_free\n- U rdmacore50_0_dr_ste_get_ctx\n- U rdmacore50_0_dr_vports_table_add_wire\n- U rdmacore50_0_dr_vports_table_create\n- U rdmacore50_0_dr_vports_table_del_wire\n- U rdmacore50_0_dr_vports_table_destroy\n- U rdmacore50_0_dr_vports_table_get_ib_port_cap\n-\n-dr_arg.c.o:\n- U __errno_location\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t dr_arg_pool_alloc_objs\n- U free\n- U mlx5dv_devx_obj_destroy\n- U pthread_mutex_destroy\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n-00000000000001c0 T rdmacore50_0_dr_arg_get_obj\n-00000000000001b0 T rdmacore50_0_dr_arg_get_object_id\n-0000000000000390 T rdmacore50_0_dr_arg_mngr_create\n-0000000000000500 T rdmacore50_0_dr_arg_mngr_destroy\n-0000000000000330 T rdmacore50_0_dr_arg_put_obj\n- U rdmacore50_0_dr_devx_create_modify_header_arg\n- U rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n- U rdmacore50_0_dr_send_postsend_args\n-\n mlx5.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000018 r .LC10\n 0000000000000012 r .LC11\n 0000000000000022 r .LC12\n 0000000000000026 r .LC13\n@@ -1983,32 +730,108 @@\n U stderr\n U strchr\n U strncpy\n U strrchr\n U sysconf\n 0000000000000000 D verbs_provider_mlx5\n \n-dr_crc32.c.o:\n+qp.c.o:\n 0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-0000000000000020 r .LC2\n-0000000000000030 r .LC3\n-0000000000000040 r .LC4\n-0000000000000000 b dr_ste_crc_tab32\n-0000000000000000 T rdmacore50_0_dr_crc32_init_table\n-0000000000000400 T rdmacore50_0_dr_crc32_slice8_calc\n-\n-dr_ste_v2.c.o:\n-0000000000000000 b ctx_mutex\n-0000000000000000 r dr_ste_v2_action_modify_field_arr\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_dr_ste_get_ctx_v1\n-0000000000000000 T rdmacore50_0_dr_ste_get_ctx_v2\n-0000000000000040 b ste_ctx_v2\n+0000000000000090 r .LC3\n+0000000000000000 r .LC4\n+0000000000000000 r .LC5\n+0000000000000158 r CSWTCH.171\n+0000000000000140 r CSWTCH.180\n+ U __errno_location\n+ U __stack_chk_fail\n+ U __vfprintf_chk\n+00000000000073c0 t _mlx5_post_send\n+ U abort\n+0000000000000164 r bs_selector.0\n+ U calloc\n+ U free\n+ U fwrite\n+ U getenv\n+ U ibv_qp_to_qp_ex\n+ U memcpy\n+ U memset\n+0000000000000390 t mlx5_err\n+0000000000000180 r mlx5_ib_opcode\n+0000000000000500 t mlx5_qp_query_sqd\n+00000000000004b0 t mlx5_send_wr_abort\n+0000000000003bd0 t mlx5_send_wr_atomic_cmp_swp\n+0000000000003910 t mlx5_send_wr_atomic_fetch_add\n+0000000000004ab0 t mlx5_send_wr_bind_mw\n+0000000000001170 t mlx5_send_wr_complete\n+0000000000000450 t mlx5_send_wr_complete_error\n+0000000000004f30 t mlx5_send_wr_local_inv\n+00000000000063e0 t mlx5_send_wr_mkey_configure\n+00000000000069c0 t mlx5_send_wr_mr_interleaved\n+0000000000006e30 t mlx5_send_wr_mr_list\n+0000000000002f40 t mlx5_send_wr_rdma_read\n+00000000000031b0 t mlx5_send_wr_rdma_write\n+0000000000003680 t mlx5_send_wr_rdma_write_imm\n+0000000000004260 t mlx5_send_wr_send_eth\n+0000000000002ce0 t mlx5_send_wr_send_imm\n+0000000000003420 t mlx5_send_wr_send_inv\n+0000000000002a80 t mlx5_send_wr_send_other\n+00000000000047b0 t mlx5_send_wr_send_tso\n+0000000000001f50 t mlx5_send_wr_set_dc_addr\n+0000000000002070 t mlx5_send_wr_set_dc_addr_stream\n+0000000000001620 t mlx5_send_wr_set_inline_data_eth\n+00000000000024b0 t mlx5_send_wr_set_inline_data_list_eth\n+0000000000000f50 t mlx5_send_wr_set_inline_data_list_rc_uc\n+0000000000002860 t mlx5_send_wr_set_inline_data_list_ud_xrc_dc\n+0000000000000db0 t mlx5_send_wr_set_inline_data_rc_uc\n+0000000000002300 t mlx5_send_wr_set_inline_data_ud_xrc_dc\n+0000000000006320 t mlx5_send_wr_set_mkey_access_flags\n+0000000000005d90 t mlx5_send_wr_set_mkey_crypto\n+0000000000006000 t mlx5_send_wr_set_mkey_layout\n+0000000000006310 t mlx5_send_wr_set_mkey_layout_interleaved\n+00000000000067d0 t mlx5_send_wr_set_mkey_layout_list\n+0000000000005e40 t mlx5_send_wr_set_mkey_sig_block\n+00000000000013b0 t mlx5_send_wr_set_sge_eth\n+0000000000001920 t mlx5_send_wr_set_sge_list_eth\n+0000000000000c40 t mlx5_send_wr_set_sge_list_rc_uc\n+0000000000002190 t mlx5_send_wr_set_sge_list_ud_xrc_dc\n+0000000000000b40 t mlx5_send_wr_set_sge_rc_uc\n+0000000000001e50 t mlx5_send_wr_set_sge_ud_xrc_dc\n+0000000000001d40 t mlx5_send_wr_set_ud_addr\n+0000000000001c50 t mlx5_send_wr_set_xrc_srqn\n+0000000000000670 t mlx5_send_wr_start\n+0000000000000710 t mlx5_umr_fill_sig_bsf\n+00000000000044c0 t mlx5_umr_set_psv\n+00000000000005f0 t mlx5_validate_sig_block_domain\n+0000000000000000 t mlx5_wr_memcpy\n+0000000000003ea0 t mlx5_wr_raw_wqe\n+ U mlx5dv_devx_qp_query\n+000000000000a520 T mlx5dv_qp_cancel_posted_send_wrs\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+0000000000009270 T rdmacore50_0_mlx5_bind_mw\n+000000000000a4e0 T rdmacore50_0_mlx5_clear_qp\n+0000000000008900 T rdmacore50_0_mlx5_copy_to_recv_wqe\n+0000000000008a00 T rdmacore50_0_mlx5_copy_to_send_wqe\n+000000000000a430 T rdmacore50_0_mlx5_find_qp\n+0000000000008cd0 T rdmacore50_0_mlx5_get_atomic_laddr\n+ U rdmacore50_0_mlx5_get_cmd_status_err\n+0000000000008c70 T rdmacore50_0_mlx5_get_send_wqe\n+0000000000008ca0 T rdmacore50_0_mlx5_init_qp_indices\n+0000000000008c90 T rdmacore50_0_mlx5_init_rwq_indices\n+0000000000009750 T rdmacore50_0_mlx5_post_recv\n+0000000000008d00 T rdmacore50_0_mlx5_post_send\n+0000000000009b50 T rdmacore50_0_mlx5_post_srq_ops\n+0000000000009380 T rdmacore50_0_mlx5_post_wq_recv\n+0000000000008d10 T rdmacore50_0_mlx5_qp_fill_wr_complete_error\n+0000000000008d30 T rdmacore50_0_mlx5_qp_fill_wr_complete_real\n+0000000000008d50 T rdmacore50_0_mlx5_qp_fill_wr_pfns\n+000000000000a460 T rdmacore50_0_mlx5_store_qp\n+000000000000a3f0 T rdmacore50_0_mlx5_use_huge\n+ U stderr\n+0000000000005230 t umr_wqe_finalize\n \n verbs.c.o:\n 0000000000000000 r .LC19\n 0000000000000000 r .LC21\n 0000000000000008 r .LC23\n 000000000000000e r .LC26\n 0000000000000021 r .LC27\n@@ -2368,7 +1191,1184 @@\n U rdmacore50_0_mlx5_use_huge\n U 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rdmacore50_0_dr_arg_mngr_create\n+0000000000000500 T rdmacore50_0_dr_arg_mngr_destroy\n+0000000000000330 T rdmacore50_0_dr_arg_put_obj\n+ U rdmacore50_0_dr_devx_create_modify_header_arg\n+ U rdmacore50_0_dr_domain_is_support_modify_hdr_cache\n+ U rdmacore50_0_dr_send_postsend_args\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,27 +1,27 @@\n ---------- 0 0 0 15454 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 15800 1970-01-01 00:00:00.000000 dr_devx.c.o\n-?rw-r--r-- 0 0 0 85480 1970-01-01 00:00:00.000000 mlx5_vfio.c.o\n-?rw-r--r-- 0 0 0 4504 1970-01-01 00:00:00.000000 dr_ptrn.c.o\n ?rw-r--r-- 0 0 0 3880 1970-01-01 00:00:00.000000 dbrec.c.o\n-?rw-r--r-- 0 0 0 3672 1970-01-01 00:00:00.000000 dr_buddy.c.o\n+?rw-r--r-- 0 0 0 19096 1970-01-01 00:00:00.000000 dr_rule.c.o\n+?rw-r--r-- 0 0 0 48528 1970-01-01 00:00:00.000000 mlx5.c.o\n+?rw-r--r-- 0 0 0 62304 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 117712 1970-01-01 00:00:00.000000 verbs.c.o\n ?rw-r--r-- 0 0 0 26976 1970-01-01 00:00:00.000000 dr_ste.c.o\n-?rw-r--r-- 0 0 0 21896 1970-01-01 00:00:00.000000 dr_matcher.c.o\n-?rw-r--r-- 0 0 0 8688 1970-01-01 00:00:00.000000 dr_icm_pool.c.o\n-?rw-r--r-- 0 0 0 146720 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r-- 0 0 0 15648 1970-01-01 00:00:00.000000 dr_dbg.c.o\n-?rw-r--r-- 0 0 0 11464 1970-01-01 00:00:00.000000 buf.c.o\n+?rw-r--r-- 0 0 0 15608 1970-01-01 00:00:00.000000 dr_send.c.o\n ?rw-r--r-- 0 0 0 55712 1970-01-01 00:00:00.000000 dr_ste_v1.c.o\n-?rw-r--r-- 0 0 0 7344 1970-01-01 00:00:00.000000 srq.c.o\n-?rw-r--r-- 0 0 0 4352 1970-01-01 00:00:00.000000 dr_vports.c.o\n ?rw-r--r-- 0 0 0 33456 1970-01-01 00:00:00.000000 dr_action.c.o\n+?rw-r--r-- 0 0 0 146720 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 15800 1970-01-01 00:00:00.000000 dr_devx.c.o\n+?rw-r--r-- 0 0 0 3320 1970-01-01 00:00:00.000000 dr_ste_v2.c.o\n ?rw-r--r-- 0 0 0 4288 1970-01-01 00:00:00.000000 dr_table.c.o\n-?rw-r--r-- 0 0 0 30392 1970-01-01 00:00:00.000000 dr_ste_v0.c.o\n-?rw-r--r-- 0 0 0 19096 1970-01-01 00:00:00.000000 dr_rule.c.o\n-?rw-r--r-- 0 0 0 15608 1970-01-01 00:00:00.000000 dr_send.c.o\n-?rw-r--r-- 0 0 0 62304 1970-01-01 00:00:00.000000 qp.c.o\n+?rw-r--r-- 0 0 0 3256 1970-01-01 00:00:00.000000 dr_crc32.c.o\n ?rw-r--r-- 0 0 0 10608 1970-01-01 00:00:00.000000 dr_domain.c.o\n+?rw-r--r-- 0 0 0 21896 1970-01-01 00:00:00.000000 dr_matcher.c.o\n+?rw-r--r-- 0 0 0 8688 1970-01-01 00:00:00.000000 dr_icm_pool.c.o\n+?rw-r--r-- 0 0 0 4504 1970-01-01 00:00:00.000000 dr_ptrn.c.o\n+?rw-r--r-- 0 0 0 30392 1970-01-01 00:00:00.000000 dr_ste_v0.c.o\n+?rw-r--r-- 0 0 0 7344 1970-01-01 00:00:00.000000 srq.c.o\n+?rw-r--r-- 0 0 0 3672 1970-01-01 00:00:00.000000 dr_buddy.c.o\n+?rw-r--r-- 0 0 0 4352 1970-01-01 00:00:00.000000 dr_vports.c.o\n+?rw-r--r-- 0 0 0 85480 1970-01-01 00:00:00.000000 mlx5_vfio.c.o\n+?rw-r--r-- 0 0 0 11464 1970-01-01 00:00:00.000000 buf.c.o\n+?rw-r--r-- 0 0 0 15648 1970-01-01 00:00:00.000000 dr_dbg.c.o\n ?rw-r--r-- 0 0 0 4712 1970-01-01 00:00:00.000000 dr_arg.c.o\n-?rw-r--r-- 0 0 0 48528 1970-01-01 00:00:00.000000 mlx5.c.o\n-?rw-r--r-- 0 0 0 3256 1970-01-01 00:00:00.000000 dr_crc32.c.o\n-?rw-r--r-- 0 0 0 3320 1970-01-01 00:00:00.000000 dr_ste_v2.c.o\n-?rw-r--r-- 0 0 0 117712 1970-01-01 00:00:00.000000 verbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libmthca-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libmthca-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,29 +1,9 @@\n \n Archive index:\n-verbs_provider_mthca in mthca.c.o\n-rdmacore50_0_mthca_poll_cq in cq.c.o\n-rdmacore50_0_mthca_tavor_arm_cq in cq.c.o\n-rdmacore50_0_mthca_arbel_arm_cq in cq.c.o\n-rdmacore50_0_mthca_arbel_cq_event in cq.c.o\n-rdmacore50_0___mthca_cq_clean in cq.c.o\n-rdmacore50_0_mthca_cq_clean in cq.c.o\n-rdmacore50_0_mthca_cq_resize_copy_cqes in cq.c.o\n-rdmacore50_0_mthca_alloc_cq_buf in cq.c.o\n-rdmacore50_0_mthca_alloc_buf in buf.c.o\n-rdmacore50_0_mthca_free_buf in buf.c.o\n-rdmacore50_0_mthca_free_srq_wqe in srq.c.o\n-rdmacore50_0_mthca_tavor_post_srq_recv in srq.c.o\n-rdmacore50_0_mthca_arbel_post_srq_recv in srq.c.o\n-rdmacore50_0_mthca_alloc_srq_buf in srq.c.o\n-rdmacore50_0_mthca_alloc_db in memfree.c.o\n-rdmacore50_0_mthca_set_db_qn in memfree.c.o\n-rdmacore50_0_mthca_free_db in memfree.c.o\n-rdmacore50_0_mthca_alloc_db_tab in memfree.c.o\n-rdmacore50_0_mthca_free_db_tab in memfree.c.o\n rdmacore50_0_mthca_alloc_av in ah.c.o\n rdmacore50_0_mthca_free_av in ah.c.o\n rdmacore50_0_mthca_init_qp_indices in qp.c.o\n rdmacore50_0_mthca_tavor_post_send in qp.c.o\n rdmacore50_0_mthca_tavor_post_recv in qp.c.o\n rdmacore50_0_mthca_arbel_post_send in qp.c.o\n rdmacore50_0_mthca_arbel_post_recv in qp.c.o\n@@ -47,129 +27,34 @@\n rdmacore50_0_mthca_destroy_srq in verbs.c.o\n rdmacore50_0_mthca_create_qp in verbs.c.o\n rdmacore50_0_mthca_query_qp in verbs.c.o\n rdmacore50_0_mthca_modify_qp in verbs.c.o\n rdmacore50_0_mthca_destroy_qp in verbs.c.o\n rdmacore50_0_mthca_create_ah in verbs.c.o\n rdmacore50_0_mthca_destroy_ah in verbs.c.o\n-\n-mthca.c.o:\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n-0000000000000000 r hca_table\n- U mmap\n-0000000000000060 t mthca_alloc_context\n-0000000000000260 d mthca_ctx_arbel_ops\n-00000000000004c0 d mthca_ctx_common_ops\n-0000000000000000 d mthca_ctx_tavor_ops\n-0000000000000000 d mthca_dev_ops\n-0000000000000010 t mthca_device_alloc\n-0000000000000270 t mthca_free_context\n-0000000000000000 t mthca_uninit_device\n- U munmap\n- U pthread_mutex_init\n- U pthread_spin_init\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_attach_mcast\n- U rdmacore50_0_ibv_cmd_detach_mcast\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_mthca_alloc_db_tab\n- U rdmacore50_0_mthca_alloc_pd\n- U rdmacore50_0_mthca_arbel_arm_cq\n- U rdmacore50_0_mthca_arbel_cq_event\n- U rdmacore50_0_mthca_arbel_post_recv\n- U rdmacore50_0_mthca_arbel_post_send\n- U rdmacore50_0_mthca_arbel_post_srq_recv\n- U rdmacore50_0_mthca_create_ah\n- U rdmacore50_0_mthca_create_cq\n- U rdmacore50_0_mthca_create_qp\n- U rdmacore50_0_mthca_create_srq\n- U rdmacore50_0_mthca_dereg_mr\n- U rdmacore50_0_mthca_destroy_ah\n- U rdmacore50_0_mthca_destroy_cq\n- U rdmacore50_0_mthca_destroy_qp\n- U rdmacore50_0_mthca_destroy_srq\n- U rdmacore50_0_mthca_free_db_tab\n- U rdmacore50_0_mthca_free_pd\n- U rdmacore50_0_mthca_modify_qp\n- U rdmacore50_0_mthca_modify_srq\n- U rdmacore50_0_mthca_poll_cq\n- U rdmacore50_0_mthca_query_device\n- U rdmacore50_0_mthca_query_port\n- U rdmacore50_0_mthca_query_qp\n- U rdmacore50_0_mthca_query_srq\n- U rdmacore50_0_mthca_reg_mr\n- U rdmacore50_0_mthca_resize_cq\n- U rdmacore50_0_mthca_tavor_arm_cq\n- U rdmacore50_0_mthca_tavor_post_recv\n- U rdmacore50_0_mthca_tavor_post_send\n- U rdmacore50_0_mthca_tavor_post_srq_recv\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n- U sysconf\n-0000000000000000 D verbs_provider_mthca\n-\n-cq.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n- U __printf_chk\n- U __stack_chk_fail\n- U pthread_spin_lock\n- U pthread_spin_unlock\n-00000000000008a0 T rdmacore50_0___mthca_cq_clean\n- U rdmacore50_0_mthca_alloc_buf\n-0000000000000c60 T rdmacore50_0_mthca_alloc_cq_buf\n-0000000000000800 T rdmacore50_0_mthca_arbel_arm_cq\n-0000000000000890 T rdmacore50_0_mthca_arbel_cq_event\n-0000000000000b70 T rdmacore50_0_mthca_cq_clean\n-0000000000000bc0 T rdmacore50_0_mthca_cq_resize_copy_cqes\n- U rdmacore50_0_mthca_find_qp\n- U rdmacore50_0_mthca_free_err_wqe\n- U rdmacore50_0_mthca_free_srq_wqe\n-0000000000000000 T rdmacore50_0_mthca_poll_cq\n-00000000000007c0 T rdmacore50_0_mthca_tavor_arm_cq\n-\n-buf.c.o:\n- U __errno_location\n- U ibv_dofork_range\n- U ibv_dontfork_range\n- U mmap\n- U munmap\n-0000000000000000 T rdmacore50_0_mthca_alloc_buf\n-0000000000000090 T rdmacore50_0_mthca_free_buf\n-\n-srq.c.o:\n-0000000000000000 r .LC0\n- U free\n- U malloc\n- U memset\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_mthca_alloc_buf\n-0000000000000430 T rdmacore50_0_mthca_alloc_srq_buf\n-00000000000002b0 T rdmacore50_0_mthca_arbel_post_srq_recv\n-0000000000000000 T rdmacore50_0_mthca_free_srq_wqe\n-0000000000000070 T rdmacore50_0_mthca_tavor_post_srq_recv\n-\n-memfree.c.o:\n- U free\n- U malloc\n- U pthread_mutex_init\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdmacore50_0_mthca_alloc_buf\n-0000000000000000 T rdmacore50_0_mthca_alloc_db\n-0000000000000440 T rdmacore50_0_mthca_alloc_db_tab\n- U rdmacore50_0_mthca_free_buf\n-00000000000003a0 T rdmacore50_0_mthca_free_db\n-00000000000004c0 T rdmacore50_0_mthca_free_db_tab\n-0000000000000380 T rdmacore50_0_mthca_set_db_qn\n+rdmacore50_0_mthca_alloc_db in memfree.c.o\n+rdmacore50_0_mthca_set_db_qn in memfree.c.o\n+rdmacore50_0_mthca_free_db in memfree.c.o\n+rdmacore50_0_mthca_alloc_db_tab in memfree.c.o\n+rdmacore50_0_mthca_free_db_tab in memfree.c.o\n+verbs_provider_mthca in mthca.c.o\n+rdmacore50_0_mthca_poll_cq in cq.c.o\n+rdmacore50_0_mthca_tavor_arm_cq in cq.c.o\n+rdmacore50_0_mthca_arbel_arm_cq in cq.c.o\n+rdmacore50_0_mthca_arbel_cq_event in cq.c.o\n+rdmacore50_0___mthca_cq_clean in cq.c.o\n+rdmacore50_0_mthca_cq_clean in cq.c.o\n+rdmacore50_0_mthca_cq_resize_copy_cqes in cq.c.o\n+rdmacore50_0_mthca_alloc_cq_buf in cq.c.o\n+rdmacore50_0_mthca_free_srq_wqe in srq.c.o\n+rdmacore50_0_mthca_tavor_post_srq_recv in srq.c.o\n+rdmacore50_0_mthca_arbel_post_srq_recv in srq.c.o\n+rdmacore50_0_mthca_alloc_srq_buf in srq.c.o\n+rdmacore50_0_mthca_alloc_buf in buf.c.o\n+rdmacore50_0_mthca_free_buf in buf.c.o\n \n ah.c.o:\n U free\n U malloc\n U memset\n U pthread_mutex_lock\n U pthread_mutex_unlock\n@@ -263,7 +148,122 @@\n 00000000000000a0 T rdmacore50_0_mthca_query_port\n 00000000000011f0 T rdmacore50_0_mthca_query_qp\n 0000000000000c60 T rdmacore50_0_mthca_query_srq\n 00000000000001e0 T rdmacore50_0_mthca_reg_mr\n 0000000000000660 T rdmacore50_0_mthca_resize_cq\n U rdmacore50_0_mthca_set_db_qn\n U rdmacore50_0_mthca_store_qp\n+\n+memfree.c.o:\n+ U free\n+ U malloc\n+ U pthread_mutex_init\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdmacore50_0_mthca_alloc_buf\n+0000000000000000 T rdmacore50_0_mthca_alloc_db\n+0000000000000440 T rdmacore50_0_mthca_alloc_db_tab\n+ U rdmacore50_0_mthca_free_buf\n+00000000000003a0 T rdmacore50_0_mthca_free_db\n+00000000000004c0 T rdmacore50_0_mthca_free_db_tab\n+0000000000000380 T rdmacore50_0_mthca_set_db_qn\n+\n+mthca.c.o:\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+0000000000000000 r hca_table\n+ U mmap\n+0000000000000060 t mthca_alloc_context\n+0000000000000260 d mthca_ctx_arbel_ops\n+00000000000004c0 d mthca_ctx_common_ops\n+0000000000000000 d mthca_ctx_tavor_ops\n+0000000000000000 d mthca_dev_ops\n+0000000000000010 t mthca_device_alloc\n+0000000000000270 t mthca_free_context\n+0000000000000000 t mthca_uninit_device\n+ U munmap\n+ U pthread_mutex_init\n+ U pthread_spin_init\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_attach_mcast\n+ U rdmacore50_0_ibv_cmd_detach_mcast\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_mthca_alloc_db_tab\n+ U rdmacore50_0_mthca_alloc_pd\n+ U rdmacore50_0_mthca_arbel_arm_cq\n+ U rdmacore50_0_mthca_arbel_cq_event\n+ U rdmacore50_0_mthca_arbel_post_recv\n+ U rdmacore50_0_mthca_arbel_post_send\n+ U rdmacore50_0_mthca_arbel_post_srq_recv\n+ U rdmacore50_0_mthca_create_ah\n+ U rdmacore50_0_mthca_create_cq\n+ U rdmacore50_0_mthca_create_qp\n+ U rdmacore50_0_mthca_create_srq\n+ U rdmacore50_0_mthca_dereg_mr\n+ U rdmacore50_0_mthca_destroy_ah\n+ U rdmacore50_0_mthca_destroy_cq\n+ U rdmacore50_0_mthca_destroy_qp\n+ U rdmacore50_0_mthca_destroy_srq\n+ U rdmacore50_0_mthca_free_db_tab\n+ U rdmacore50_0_mthca_free_pd\n+ U rdmacore50_0_mthca_modify_qp\n+ U rdmacore50_0_mthca_modify_srq\n+ U rdmacore50_0_mthca_poll_cq\n+ U rdmacore50_0_mthca_query_device\n+ U rdmacore50_0_mthca_query_port\n+ U rdmacore50_0_mthca_query_qp\n+ U rdmacore50_0_mthca_query_srq\n+ U rdmacore50_0_mthca_reg_mr\n+ U rdmacore50_0_mthca_resize_cq\n+ U rdmacore50_0_mthca_tavor_arm_cq\n+ U rdmacore50_0_mthca_tavor_post_recv\n+ U rdmacore50_0_mthca_tavor_post_send\n+ U rdmacore50_0_mthca_tavor_post_srq_recv\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+ U sysconf\n+0000000000000000 D verbs_provider_mthca\n+\n+cq.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+ U __printf_chk\n+ U __stack_chk_fail\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+00000000000008a0 T rdmacore50_0___mthca_cq_clean\n+ U rdmacore50_0_mthca_alloc_buf\n+0000000000000c60 T rdmacore50_0_mthca_alloc_cq_buf\n+0000000000000800 T rdmacore50_0_mthca_arbel_arm_cq\n+0000000000000890 T rdmacore50_0_mthca_arbel_cq_event\n+0000000000000b70 T rdmacore50_0_mthca_cq_clean\n+0000000000000bc0 T rdmacore50_0_mthca_cq_resize_copy_cqes\n+ U rdmacore50_0_mthca_find_qp\n+ U rdmacore50_0_mthca_free_err_wqe\n+ U rdmacore50_0_mthca_free_srq_wqe\n+0000000000000000 T rdmacore50_0_mthca_poll_cq\n+00000000000007c0 T rdmacore50_0_mthca_tavor_arm_cq\n+\n+srq.c.o:\n+0000000000000000 r .LC0\n+ U free\n+ U malloc\n+ U memset\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_mthca_alloc_buf\n+0000000000000430 T rdmacore50_0_mthca_alloc_srq_buf\n+00000000000002b0 T rdmacore50_0_mthca_arbel_post_srq_recv\n+0000000000000000 T rdmacore50_0_mthca_free_srq_wqe\n+0000000000000070 T rdmacore50_0_mthca_tavor_post_srq_recv\n+\n+buf.c.o:\n+ U __errno_location\n+ U ibv_dofork_range\n+ U ibv_dontfork_range\n+ U mmap\n+ U munmap\n+0000000000000000 T rdmacore50_0_mthca_alloc_buf\n+0000000000000090 T rdmacore50_0_mthca_free_buf\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,9 +1,9 @@\n ---------- 0 0 0 1762 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 9600 1970-01-01 00:00:00.000000 mthca.c.o\n-?rw-r--r-- 0 0 0 8144 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r-- 0 0 0 1808 1970-01-01 00:00:00.000000 buf.c.o\n-?rw-r--r-- 0 0 0 3840 1970-01-01 00:00:00.000000 srq.c.o\n-?rw-r--r-- 0 0 0 3568 1970-01-01 00:00:00.000000 memfree.c.o\n ?rw-r--r-- 0 0 0 3184 1970-01-01 00:00:00.000000 ah.c.o\n ?rw-r--r-- 0 0 0 9232 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r-- 0 0 0 15152 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 3568 1970-01-01 00:00:00.000000 memfree.c.o\n+?rw-r--r-- 0 0 0 9600 1970-01-01 00:00:00.000000 mthca.c.o\n+?rw-r--r-- 0 0 0 8144 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 3840 1970-01-01 00:00:00.000000 srq.c.o\n+?rw-r--r-- 0 0 0 1808 1970-01-01 00:00:00.000000 buf.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libocrdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libocrdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,9 +1,10 @@\n \n Archive index:\n+verbs_provider_ocrdma in ocrdma_main.c.o\n rdmacore50_0_ocrdma_query_device in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_query_port in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_init_ahid_tbl in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_alloc_pd in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_free_pd in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_reg_mr in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_dereg_mr in ocrdma_verbs.c.o\n@@ -23,15 +24,67 @@\n rdmacore50_0_ocrdma_poll_cq in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_arm_cq in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_post_srq_recv in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_create_ah in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_destroy_ah in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_attach_mcast in ocrdma_verbs.c.o\n rdmacore50_0_ocrdma_detach_mcast in ocrdma_verbs.c.o\n-verbs_provider_ocrdma in ocrdma_main.c.o\n+\n+ocrdma_main.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r __func__.0\n+ U __printf_chk\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U free\n+ U mmap\n+ U munmap\n+00000000000000c0 t ocrdma_alloc_context\n+0000000000000000 d ocrdma_ctx_ops\n+0000000000000000 d ocrdma_dev_ops\n+0000000000000010 t ocrdma_device_alloc\n+0000000000000080 t ocrdma_free_context\n+0000000000000000 t ocrdma_uninit_device\n+ U pthread_mutex_init\n+ U pthread_spin_init\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_ocrdma_alloc_pd\n+ U rdmacore50_0_ocrdma_arm_cq\n+ U rdmacore50_0_ocrdma_attach_mcast\n+ U rdmacore50_0_ocrdma_create_ah\n+ U rdmacore50_0_ocrdma_create_cq\n+ U rdmacore50_0_ocrdma_create_qp\n+ U rdmacore50_0_ocrdma_create_srq\n+ U rdmacore50_0_ocrdma_dereg_mr\n+ U rdmacore50_0_ocrdma_destroy_ah\n+ U rdmacore50_0_ocrdma_destroy_cq\n+ U rdmacore50_0_ocrdma_destroy_qp\n+ U rdmacore50_0_ocrdma_destroy_srq\n+ U rdmacore50_0_ocrdma_detach_mcast\n+ U rdmacore50_0_ocrdma_free_pd\n+ U rdmacore50_0_ocrdma_init_ahid_tbl\n+ U rdmacore50_0_ocrdma_modify_qp\n+ U rdmacore50_0_ocrdma_modify_srq\n+ U rdmacore50_0_ocrdma_poll_cq\n+ U rdmacore50_0_ocrdma_post_recv\n+ U rdmacore50_0_ocrdma_post_send\n+ U rdmacore50_0_ocrdma_post_srq_recv\n+ U rdmacore50_0_ocrdma_query_device\n+ U rdmacore50_0_ocrdma_query_port\n+ U rdmacore50_0_ocrdma_query_qp\n+ U rdmacore50_0_ocrdma_query_srq\n+ U rdmacore50_0_ocrdma_reg_mr\n+ U rdmacore50_0_ocrdma_resize_cq\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+0000000000000020 r ucna_table\n+0000000000000000 D verbs_provider_ocrdma\n \n ocrdma_verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000000 r .LC1\n 0000000000000038 r .LC3\n 0000000000000068 r .LC4\n 0000000000000008 r .LC5\n@@ -104,60 +157,7 @@\n 0000000000003c90 T rdmacore50_0_ocrdma_post_srq_recv\n 0000000000000560 T rdmacore50_0_ocrdma_query_device\n 00000000000005e0 T rdmacore50_0_ocrdma_query_port\n 0000000000001030 T rdmacore50_0_ocrdma_query_qp\n 0000000000000eb0 T rdmacore50_0_ocrdma_query_srq\n 00000000000007f0 T rdmacore50_0_ocrdma_reg_mr\n 0000000000000b10 T rdmacore50_0_ocrdma_resize_cq\n-\n-ocrdma_main.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r __func__.0\n- U __printf_chk\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U free\n- U mmap\n- U munmap\n-00000000000000c0 t ocrdma_alloc_context\n-0000000000000000 d ocrdma_ctx_ops\n-0000000000000000 d ocrdma_dev_ops\n-0000000000000010 t ocrdma_device_alloc\n-0000000000000080 t ocrdma_free_context\n-0000000000000000 t ocrdma_uninit_device\n- U pthread_mutex_init\n- U pthread_spin_init\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_ocrdma_alloc_pd\n- U rdmacore50_0_ocrdma_arm_cq\n- U rdmacore50_0_ocrdma_attach_mcast\n- U rdmacore50_0_ocrdma_create_ah\n- U rdmacore50_0_ocrdma_create_cq\n- U rdmacore50_0_ocrdma_create_qp\n- U rdmacore50_0_ocrdma_create_srq\n- U rdmacore50_0_ocrdma_dereg_mr\n- U rdmacore50_0_ocrdma_destroy_ah\n- U rdmacore50_0_ocrdma_destroy_cq\n- U rdmacore50_0_ocrdma_destroy_qp\n- U rdmacore50_0_ocrdma_destroy_srq\n- U rdmacore50_0_ocrdma_detach_mcast\n- U rdmacore50_0_ocrdma_free_pd\n- U rdmacore50_0_ocrdma_init_ahid_tbl\n- U rdmacore50_0_ocrdma_modify_qp\n- U rdmacore50_0_ocrdma_modify_srq\n- U rdmacore50_0_ocrdma_poll_cq\n- U rdmacore50_0_ocrdma_post_recv\n- U rdmacore50_0_ocrdma_post_send\n- U rdmacore50_0_ocrdma_post_srq_recv\n- U rdmacore50_0_ocrdma_query_device\n- U rdmacore50_0_ocrdma_query_port\n- U rdmacore50_0_ocrdma_query_qp\n- U rdmacore50_0_ocrdma_query_srq\n- U rdmacore50_0_ocrdma_reg_mr\n- U rdmacore50_0_ocrdma_resize_cq\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n-0000000000000020 r ucna_table\n-0000000000000000 D verbs_provider_ocrdma\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 960 1970-01-01 00:00:00.000000 /\n ---------- 0 0 0 0 1970-01-01 00:00:00.000000 //\n-?rw-r--r-- 0 0 0 29640 1970-01-01 00:00:00.000000 ocrdma_verbs.c.o\n ?rw-r--r-- 0 0 0 7600 1970-01-01 00:00:00.000000 ocrdma_main.c.o\n+?rw-r--r-- 0 0 0 29640 1970-01-01 00:00:00.000000 ocrdma_verbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libqedr-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libqedr-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,13 +1,16 @@\n \n Archive index:\n rdmacore50_0_qelr_chain_get_last_elem in qelr_chain.c.o\n rdmacore50_0_qelr_chain_reset in qelr_chain.c.o\n rdmacore50_0_qelr_chain_alloc in qelr_chain.c.o\n rdmacore50_0_qelr_chain_free in qelr_chain.c.o\n+rdmacore50_0_qelr_dp_level in qelr_main.c.o\n+rdmacore50_0_qelr_dp_module in qelr_main.c.o\n+verbs_provider_qedr in qelr_main.c.o\n rdmacore50_0_qelr_query_device in qelr_verbs.c.o\n rdmacore50_0_qelr_query_port in qelr_verbs.c.o\n rdmacore50_0_qelr_alloc_pd in qelr_verbs.c.o\n rdmacore50_0_qelr_dealloc_pd in qelr_verbs.c.o\n rdmacore50_0_qelr_reg_mr in qelr_verbs.c.o\n rdmacore50_0_qelr_dereg_mr in qelr_verbs.c.o\n rdmacore50_0_qelr_create_cq in qelr_verbs.c.o\n@@ -28,29 +31,100 @@\n rdmacore50_0_qelr_async_event in qelr_verbs.c.o\n rdmacore50_0_qelr_open_xrcd in qelr_verbs.c.o\n rdmacore50_0_qelr_close_xrcd in qelr_verbs.c.o\n rdmacore50_0_qelr_get_srq_num in qelr_verbs.c.o\n rdmacore50_0_qelr_create_srq_ex in qelr_verbs.c.o\n rdmacore50_0_qelr_create_qp_ex in qelr_verbs.c.o\n rdmacore50_0_qelr_create_qp in qelr_verbs.c.o\n-rdmacore50_0_qelr_dp_level in qelr_main.c.o\n-rdmacore50_0_qelr_dp_module in qelr_main.c.o\n-verbs_provider_qedr in qelr_main.c.o\n \n qelr_chain.c.o:\n U __errno_location\n U ibv_dofork_range\n U ibv_dontfork_range\n U mmap\n U munmap\n 0000000000000040 T rdmacore50_0_qelr_chain_alloc\n 0000000000000130 T rdmacore50_0_qelr_chain_free\n 0000000000000000 T rdmacore50_0_qelr_chain_get_last_elem\n 0000000000000020 T rdmacore50_0_qelr_chain_reset\n \n+qelr_main.c.o:\n+0000000000000000 r .LC0\n+0000000000000000 r .LC1\n+0000000000000010 r .LC2\n+0000000000000028 r .LC3\n+0000000000000014 r .LC4\n+0000000000000032 r .LC5\n+0000000000000040 r .LC6\n+0000000000000058 r .LC7\n+0000000000000080 r .LC8\n+00000000000000f0 r .LC9\n+ U __errno_location\n+ U __fprintf_chk\n+0000000000000020 r __func__.0\n+0000000000000000 r __func__.1\n+ U __printf_chk\n+ U __stack_chk_fail\n+ U calloc\n+0000000000000000 t drv__register_driver\n+ U fclose\n+ U fflush\n+ U fopen\n+ U free\n+ U getenv\n+0000000000000040 r hca_table\n+ U mmap\n+ U munmap\n+00000000000000a0 t qelr_alloc_context\n+0000000000000260 d qelr_ctx_ops\n+0000000000000000 d qelr_ctx_roce_ops\n+0000000000000000 d qelr_dev_ops\n+0000000000000010 t qelr_device_alloc\n+0000000000000030 t qelr_free_context\n+0000000000000000 t qelr_uninit_device\n+ U rdmacore50_0__verbs_init_and_alloc_context\n+ U rdmacore50_0_ibv_cmd_get_context\n+ U rdmacore50_0_qelr_alloc_pd\n+ U rdmacore50_0_qelr_arm_cq\n+ U rdmacore50_0_qelr_async_event\n+ U rdmacore50_0_qelr_close_xrcd\n+ U rdmacore50_0_qelr_cq_event\n+ U rdmacore50_0_qelr_create_cq\n+ U rdmacore50_0_qelr_create_qp\n+ U rdmacore50_0_qelr_create_qp_ex\n+ U rdmacore50_0_qelr_create_srq\n+ U rdmacore50_0_qelr_create_srq_ex\n+ U rdmacore50_0_qelr_dealloc_pd\n+ U rdmacore50_0_qelr_dereg_mr\n+ U rdmacore50_0_qelr_destroy_cq\n+ U rdmacore50_0_qelr_destroy_qp\n+ U rdmacore50_0_qelr_destroy_srq\n+0000000000000004 B rdmacore50_0_qelr_dp_level\n+0000000000000000 B rdmacore50_0_qelr_dp_module\n+ U rdmacore50_0_qelr_get_srq_num\n+ U rdmacore50_0_qelr_modify_qp\n+ U rdmacore50_0_qelr_modify_srq\n+ U rdmacore50_0_qelr_open_xrcd\n+ U rdmacore50_0_qelr_poll_cq\n+ U rdmacore50_0_qelr_post_recv\n+ U rdmacore50_0_qelr_post_send\n+ U rdmacore50_0_qelr_post_srq_recv\n+ U rdmacore50_0_qelr_query_device\n+ U rdmacore50_0_qelr_query_port\n+ U rdmacore50_0_qelr_query_qp\n+ U rdmacore50_0_qelr_query_srq\n+ U rdmacore50_0_qelr_reg_mr\n+ U rdmacore50_0_verbs_register_driver_34\n+ U rdmacore50_0_verbs_set_ops\n+ U rdmacore50_0_verbs_uninit_context\n+ U stderr\n+ U strtol\n+ U sysconf\n+0000000000000000 D verbs_provider_qedr\n+\n qelr_verbs.c.o:\n 0000000000000000 r .LC0\n 0000000000000030 r .LC1\n 0000000000000270 r .LC10\n 00000000000002e0 r .LC11\n 0000000000000318 r .LC12\n 0000000000000350 r .LC13\n@@ -231,81 +305,7 @@\n 0000000000003a90 T rdmacore50_0_qelr_post_srq_recv\n 0000000000001fc0 T rdmacore50_0_qelr_query_device\n 0000000000002070 T rdmacore50_0_qelr_query_port\n 0000000000002b40 T rdmacore50_0_qelr_query_qp\n 0000000000002910 T rdmacore50_0_qelr_query_srq\n 0000000000002240 T rdmacore50_0_qelr_reg_mr\n U stderr\n-\n-qelr_main.c.o:\n-0000000000000000 r .LC0\n-0000000000000000 r .LC1\n-0000000000000010 r .LC2\n-0000000000000028 r .LC3\n-0000000000000014 r .LC4\n-0000000000000032 r .LC5\n-0000000000000040 r .LC6\n-0000000000000058 r .LC7\n-0000000000000080 r .LC8\n-00000000000000f0 r .LC9\n- U __errno_location\n- U __fprintf_chk\n-0000000000000020 r __func__.0\n-0000000000000000 r __func__.1\n- U __printf_chk\n- U __stack_chk_fail\n- U calloc\n-0000000000000000 t drv__register_driver\n- U fclose\n- U fflush\n- U fopen\n- U free\n- U getenv\n-0000000000000040 r hca_table\n- U mmap\n- U munmap\n-00000000000000a0 t qelr_alloc_context\n-0000000000000260 d qelr_ctx_ops\n-0000000000000000 d qelr_ctx_roce_ops\n-0000000000000000 d qelr_dev_ops\n-0000000000000010 t qelr_device_alloc\n-0000000000000030 t qelr_free_context\n-0000000000000000 t qelr_uninit_device\n- U rdmacore50_0__verbs_init_and_alloc_context\n- U rdmacore50_0_ibv_cmd_get_context\n- U rdmacore50_0_qelr_alloc_pd\n- U rdmacore50_0_qelr_arm_cq\n- U rdmacore50_0_qelr_async_event\n- U rdmacore50_0_qelr_close_xrcd\n- U rdmacore50_0_qelr_cq_event\n- U rdmacore50_0_qelr_create_cq\n- U rdmacore50_0_qelr_create_qp\n- U rdmacore50_0_qelr_create_qp_ex\n- U rdmacore50_0_qelr_create_srq\n- U rdmacore50_0_qelr_create_srq_ex\n- U rdmacore50_0_qelr_dealloc_pd\n- U rdmacore50_0_qelr_dereg_mr\n- U rdmacore50_0_qelr_destroy_cq\n- U rdmacore50_0_qelr_destroy_qp\n- U rdmacore50_0_qelr_destroy_srq\n-0000000000000004 B rdmacore50_0_qelr_dp_level\n-0000000000000000 B rdmacore50_0_qelr_dp_module\n- U rdmacore50_0_qelr_get_srq_num\n- U rdmacore50_0_qelr_modify_qp\n- U rdmacore50_0_qelr_modify_srq\n- U rdmacore50_0_qelr_open_xrcd\n- U rdmacore50_0_qelr_poll_cq\n- U rdmacore50_0_qelr_post_recv\n- U rdmacore50_0_qelr_post_send\n- U rdmacore50_0_qelr_post_srq_recv\n- U rdmacore50_0_qelr_query_device\n- U rdmacore50_0_qelr_query_port\n- U rdmacore50_0_qelr_query_qp\n- U rdmacore50_0_qelr_query_srq\n- U rdmacore50_0_qelr_reg_mr\n- U rdmacore50_0_verbs_register_driver_34\n- U rdmacore50_0_verbs_set_ops\n- U rdmacore50_0_verbs_uninit_context\n- U stderr\n- U strtol\n- U sysconf\n-0000000000000000 D verbs_provider_qedr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,4 +1,4 @@\n ---------- 0 0 0 1146 1970-01-01 00:00:00.000000 /\n ?rw-r--r-- 0 0 0 2184 1970-01-01 00:00:00.000000 qelr_chain.c.o\n-?rw-r--r-- 0 0 0 53272 1970-01-01 00:00:00.000000 qelr_verbs.c.o\n ?rw-r--r-- 0 0 0 11432 1970-01-01 00:00:00.000000 qelr_main.c.o\n+?rw-r--r-- 0 0 0 53272 1970-01-01 00:00:00.000000 qelr_verbs.c.o\n"}]}, {"source1": "./usr/lib/x86_64-linux-gnu/libvmw_pvrdma-rdmav34.a", "source2": "./usr/lib/x86_64-linux-gnu/libvmw_pvrdma-rdmav34.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,19 +1,9 @@\n \n Archive index:\n-rdmacore50_0_pvrdma_alloc_cq_buf in cq.c.o\n-rdmacore50_0_pvrdma_poll_cq in cq.c.o\n-rdmacore50_0_pvrdma_cq_clean_int in cq.c.o\n-rdmacore50_0_pvrdma_cq_clean in cq.c.o\n-rdmacore50_0_pvrdma_create_cq in cq.c.o\n-rdmacore50_0_pvrdma_destroy_cq in cq.c.o\n-rdmacore50_0_pvrdma_req_notify_cq in cq.c.o\n-rdmacore50_0_pvrdma_alloc_buf in pvrdma_main.c.o\n-rdmacore50_0_pvrdma_free_buf in pvrdma_main.c.o\n-verbs_provider_vmw_pvrdma in pvrdma_main.c.o\n rdmacore50_0_pvrdma_alloc_qp_buf in qp.c.o\n rdmacore50_0_pvrdma_init_srq_queue in qp.c.o\n rdmacore50_0_pvrdma_modify_srq in qp.c.o\n rdmacore50_0_pvrdma_query_srq in qp.c.o\n rdmacore50_0_pvrdma_destroy_srq in qp.c.o\n rdmacore50_0_pvrdma_create_qp in qp.c.o\n rdmacore50_0_pvrdma_query_qp in qp.c.o\n@@ -28,14 +18,88 @@\n rdmacore50_0_pvrdma_query_port in verbs.c.o\n rdmacore50_0_pvrdma_alloc_pd in verbs.c.o\n rdmacore50_0_pvrdma_free_pd in verbs.c.o\n rdmacore50_0_pvrdma_reg_mr in verbs.c.o\n rdmacore50_0_pvrdma_dereg_mr in verbs.c.o\n rdmacore50_0_pvrdma_create_ah in verbs.c.o\n rdmacore50_0_pvrdma_destroy_ah in verbs.c.o\n+rdmacore50_0_pvrdma_alloc_cq_buf in cq.c.o\n+rdmacore50_0_pvrdma_poll_cq in cq.c.o\n+rdmacore50_0_pvrdma_cq_clean_int in cq.c.o\n+rdmacore50_0_pvrdma_cq_clean in cq.c.o\n+rdmacore50_0_pvrdma_create_cq in cq.c.o\n+rdmacore50_0_pvrdma_destroy_cq in cq.c.o\n+rdmacore50_0_pvrdma_req_notify_cq in cq.c.o\n+rdmacore50_0_pvrdma_alloc_buf in pvrdma_main.c.o\n+rdmacore50_0_pvrdma_free_buf in pvrdma_main.c.o\n+verbs_provider_vmw_pvrdma in pvrdma_main.c.o\n+\n+qp.c.o:\n+0000000000000000 r .LC0\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+ U fwrite\n+ U malloc\n+ U memset\n+ U pthread_spin_destroy\n+ U pthread_spin_init\n+ U pthread_spin_lock\n+ U pthread_spin_unlock\n+ U rdmacore50_0_ibv_cmd_create_qp\n+ U rdmacore50_0_ibv_cmd_create_srq\n+ U rdmacore50_0_ibv_cmd_destroy_qp\n+ U rdmacore50_0_ibv_cmd_destroy_srq\n+ U rdmacore50_0_ibv_cmd_modify_qp\n+ U rdmacore50_0_ibv_cmd_modify_srq\n+ U rdmacore50_0_ibv_cmd_query_qp\n+ U rdmacore50_0_ibv_cmd_query_srq\n+ U rdmacore50_0_pvrdma_alloc_buf\n+0000000000000000 T rdmacore50_0_pvrdma_alloc_qp_buf\n+00000000000013e0 T rdmacore50_0_pvrdma_alloc_srq_buf\n+ U rdmacore50_0_pvrdma_cq_clean\n+ U rdmacore50_0_pvrdma_cq_clean_int\n+00000000000002a0 T rdmacore50_0_pvrdma_create_qp\n+00000000000014a0 T rdmacore50_0_pvrdma_create_srq\n+00000000000007e0 T rdmacore50_0_pvrdma_destroy_qp\n+0000000000000250 T rdmacore50_0_pvrdma_destroy_srq\n+ U rdmacore50_0_pvrdma_free_buf\n+00000000000001b0 T rdmacore50_0_pvrdma_init_srq_queue\n+0000000000000710 T rdmacore50_0_pvrdma_modify_qp\n+00000000000001d0 T rdmacore50_0_pvrdma_modify_srq\n+0000000000000d50 T rdmacore50_0_pvrdma_post_recv\n+0000000000000950 T rdmacore50_0_pvrdma_post_send\n+00000000000010a0 T rdmacore50_0_pvrdma_post_srq_recv\n+0000000000000680 T rdmacore50_0_pvrdma_query_qp\n+0000000000000210 T rdmacore50_0_pvrdma_query_srq\n+ U stderr\n+\n+verbs.c.o:\n+0000000000000000 r .LC0\n+ U __snprintf_chk\n+ U __stack_chk_fail\n+ U calloc\n+ U free\n+ U ibv_query_port\n+ U ibv_resolve_eth_l2_from_gid\n+ U malloc\n+ U rdmacore50_0_ibv_cmd_alloc_pd\n+ U rdmacore50_0_ibv_cmd_dealloc_pd\n+ U rdmacore50_0_ibv_cmd_dereg_mr\n+ U rdmacore50_0_ibv_cmd_query_device_any\n+ U rdmacore50_0_ibv_cmd_query_port\n+ U rdmacore50_0_ibv_cmd_reg_mr\n+00000000000000f0 T rdmacore50_0_pvrdma_alloc_pd\n+00000000000002b0 T rdmacore50_0_pvrdma_create_ah\n+0000000000000280 T rdmacore50_0_pvrdma_dereg_mr\n+0000000000000460 T rdmacore50_0_pvrdma_destroy_ah\n+0000000000000190 T rdmacore50_0_pvrdma_free_pd\n+0000000000000000 T rdmacore50_0_pvrdma_query_device\n+00000000000000a0 T rdmacore50_0_pvrdma_query_port\n+00000000000001c0 T rdmacore50_0_pvrdma_reg_mr\n \n cq.c.o:\n U __stack_chk_fail\n U free\n U malloc\n U memset\n U pthread_spin_init\n@@ -99,71 +163,7 @@\n U rdmacore50_0_pvrdma_reg_mr\n U rdmacore50_0_pvrdma_req_notify_cq\n U rdmacore50_0_verbs_register_driver_34\n U rdmacore50_0_verbs_set_ops\n U rdmacore50_0_verbs_uninit_context\n U sysconf\n 0000000000000000 D verbs_provider_vmw_pvrdma\n-\n-qp.c.o:\n-0000000000000000 r .LC0\n- U __stack_chk_fail\n- U calloc\n- U free\n- U fwrite\n- U malloc\n- U memset\n- U pthread_spin_destroy\n- U pthread_spin_init\n- U pthread_spin_lock\n- U pthread_spin_unlock\n- U rdmacore50_0_ibv_cmd_create_qp\n- U rdmacore50_0_ibv_cmd_create_srq\n- U rdmacore50_0_ibv_cmd_destroy_qp\n- U rdmacore50_0_ibv_cmd_destroy_srq\n- U rdmacore50_0_ibv_cmd_modify_qp\n- U rdmacore50_0_ibv_cmd_modify_srq\n- U rdmacore50_0_ibv_cmd_query_qp\n- U rdmacore50_0_ibv_cmd_query_srq\n- U rdmacore50_0_pvrdma_alloc_buf\n-0000000000000000 T rdmacore50_0_pvrdma_alloc_qp_buf\n-00000000000013e0 T rdmacore50_0_pvrdma_alloc_srq_buf\n- U rdmacore50_0_pvrdma_cq_clean\n- U rdmacore50_0_pvrdma_cq_clean_int\n-00000000000002a0 T rdmacore50_0_pvrdma_create_qp\n-00000000000014a0 T rdmacore50_0_pvrdma_create_srq\n-00000000000007e0 T rdmacore50_0_pvrdma_destroy_qp\n-0000000000000250 T rdmacore50_0_pvrdma_destroy_srq\n- U rdmacore50_0_pvrdma_free_buf\n-00000000000001b0 T rdmacore50_0_pvrdma_init_srq_queue\n-0000000000000710 T rdmacore50_0_pvrdma_modify_qp\n-00000000000001d0 T rdmacore50_0_pvrdma_modify_srq\n-0000000000000d50 T rdmacore50_0_pvrdma_post_recv\n-0000000000000950 T rdmacore50_0_pvrdma_post_send\n-00000000000010a0 T rdmacore50_0_pvrdma_post_srq_recv\n-0000000000000680 T rdmacore50_0_pvrdma_query_qp\n-0000000000000210 T rdmacore50_0_pvrdma_query_srq\n- U stderr\n-\n-verbs.c.o:\n-0000000000000000 r .LC0\n- U __snprintf_chk\n- U __stack_chk_fail\n- U calloc\n- U free\n- U ibv_query_port\n- U ibv_resolve_eth_l2_from_gid\n- U malloc\n- U rdmacore50_0_ibv_cmd_alloc_pd\n- U rdmacore50_0_ibv_cmd_dealloc_pd\n- U rdmacore50_0_ibv_cmd_dereg_mr\n- U rdmacore50_0_ibv_cmd_query_device_any\n- U rdmacore50_0_ibv_cmd_query_port\n- U rdmacore50_0_ibv_cmd_reg_mr\n-00000000000000f0 T rdmacore50_0_pvrdma_alloc_pd\n-00000000000002b0 T rdmacore50_0_pvrdma_create_ah\n-0000000000000280 T rdmacore50_0_pvrdma_dereg_mr\n-0000000000000460 T rdmacore50_0_pvrdma_destroy_ah\n-0000000000000190 T rdmacore50_0_pvrdma_free_pd\n-0000000000000000 T rdmacore50_0_pvrdma_query_device\n-00000000000000a0 T rdmacore50_0_pvrdma_query_port\n-00000000000001c0 T rdmacore50_0_pvrdma_reg_mr\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,5 +1,5 @@\n ---------- 0 0 0 1114 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 4400 1970-01-01 00:00:00.000000 cq.c.o\n-?rw-r--r-- 0 0 0 7640 1970-01-01 00:00:00.000000 pvrdma_main.c.o\n ?rw-r--r-- 0 0 0 11832 1970-01-01 00:00:00.000000 qp.c.o\n ?rw-r--r-- 0 0 0 4488 1970-01-01 00:00:00.000000 verbs.c.o\n+?rw-r--r-- 0 0 0 4400 1970-01-01 00:00:00.000000 cq.c.o\n+?rw-r--r-- 0 0 0 7640 1970-01-01 00:00:00.000000 pvrdma_main.c.o\n"}]}]}, {"source1": "xz --list", "source2": "xz --list", "unified_diff": "@@ -1,13 +1,13 @@\n Streams: 1\n Blocks: 1\n- Compressed size: 621.7 KiB (636620 B)\n+ Compressed size: 622.0 KiB (636888 B)\n Uncompressed size: 2360.0 KiB (2416640 B)\n- Ratio: 0.263\n+ Ratio: 0.264\n Check: CRC64\n Stream Padding: 0 B\n Streams:\n Stream Blocks CompOffset UncompOffset CompSize UncompSize Ratio Check Padding\n- 1 1 0 0 636620 2416640 0.263 CRC64 0\n+ 1 1 0 0 636888 2416640 0.264 CRC64 0\n Blocks:\n Stream Block CompOffset UncompOffset TotalSize UncompSize Ratio Check\n- 1 1 12 0 636580 2416640 0.263 CRC64\n+ 1 1 12 0 636848 2416640 0.264 CRC64\n"}]}]}, {"source1": "librdmacm-dev_50.0-2_amd64.deb", "source2": "librdmacm-dev_50.0-2_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2024-02-29 02:11:46.000000 debian-binary\n -rw-r--r-- 0 0 0 2652 2024-02-29 02:11:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 123856 2024-02-29 02:11:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 123804 2024-02-29 02:11:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/x86_64-linux-gnu/librdmacm.a", "source2": "./usr/lib/x86_64-linux-gnu/librdmacm.a", "unified_diff": null, "details": [{"source1": "nm -s {}", "source2": "nm -s {}", "unified_diff": "@@ -1,17 +1,9 @@\n \n Archive index:\n-rdmacore50_0_idx_insert in indexer.c.o\n-rdmacore50_0_idx_remove in indexer.c.o\n-rdmacore50_0_idx_replace in indexer.c.o\n-rdmacore50_0_idm_set in indexer.c.o\n-rdmacore50_0_idm_clear in indexer.c.o\n-rdmacore50_0_ucma_ib_init in acm.c.o\n-rdmacore50_0_ucma_ib_cleanup in acm.c.o\n-rdmacore50_0_ucma_ib_resolve in acm.c.o\n rdmacore50_0_ucma_set_sid in addrinfo.c.o\n rdma_freeaddrinfo in addrinfo.c.o\n rdma_getaddrinfo in addrinfo.c.o\n rdma_free_devices in cma.c.o\n rdma_destroy_event_channel in cma.c.o\n rdmacore50_0_ucma_addrlen in cma.c.o\n rdmacore50_0_af_ib_support in cma.c.o\n@@ -80,61 +72,22 @@\n rgetsockopt in rsocket.c.o\n rfcntl in rsocket.c.o\n riomap in rsocket.c.o\n riounmap in rsocket.c.o\n rsocket in rsocket.c.o\n rclose in rsocket.c.o\n riowrite in rsocket.c.o\n-\n-indexer.c.o:\n-0000000000000000 r .LC0\n-0000000000000010 r .LC1\n-0000000000000020 r .LC2\n- U __errno_location\n- U calloc\n-0000000000000240 T rdmacore50_0_idm_clear\n-00000000000001b0 T rdmacore50_0_idm_set\n-0000000000000000 T rdmacore50_0_idx_insert\n-0000000000000160 T rdmacore50_0_idx_remove\n-0000000000000190 T rdmacore50_0_idx_replace\n-\n-acm.c.o:\n-0000000000000000 r .LC0\n-0000000000000003 r .LC1\n-0000000000000013 r .LC2\n-0000000000000000 r .LC3\n-0000000000000000 r .LC5\n- U __errno_location\n- U __isoc99_fscanf\n- U __stack_chk_fail\n-0000000000000020 b acm_lock\n- U calloc\n- U close\n- U connect\n- U fclose\n- U fopen\n- U free\n-0000000000000000 b init.0\n- U memcpy\n- U pthread_mutex_lock\n- U pthread_mutex_unlock\n- U rdma_freeaddrinfo\n- U rdmacore50_0_af_ib_support\n-0000000000000200 T rdmacore50_0_ucma_ib_cleanup\n-00000000000001e0 T rdmacore50_0_ucma_ib_init\n-0000000000000230 T rdmacore50_0_ucma_ib_resolve\n- U rdmacore50_0_ucma_set_sid\n- U recv\n- U send\n-0000000000000004 b server_port\n- U shutdown\n-0000000000000000 d sock\n- U socket\n- U strdup\n-0000000000000000 t ucma_ib_init.part.0\n+rdmacore50_0_ucma_ib_init in acm.c.o\n+rdmacore50_0_ucma_ib_cleanup in acm.c.o\n+rdmacore50_0_ucma_ib_resolve in acm.c.o\n+rdmacore50_0_idx_insert in indexer.c.o\n+rdmacore50_0_idx_remove in indexer.c.o\n+rdmacore50_0_idx_replace in indexer.c.o\n+rdmacore50_0_idm_set in indexer.c.o\n+rdmacore50_0_idm_clear in indexer.c.o\n \n addrinfo.c.o:\n U __errno_location\n U __stack_chk_fail\n U calloc\n U free\n U freeaddrinfo\n@@ -510,7 +463,54 @@\n U tfind\n U tsearch\n 00000000000000c0 d udp_svc\n 0000000000000818 b udp_svc_fds\n 00000000000056a0 t udp_svc_run\n 0000000000000000 d wake_up_interval\n U write\n+\n+acm.c.o:\n+0000000000000000 r .LC0\n+0000000000000003 r .LC1\n+0000000000000013 r .LC2\n+0000000000000000 r .LC3\n+0000000000000000 r .LC5\n+ U __errno_location\n+ U __isoc99_fscanf\n+ U __stack_chk_fail\n+0000000000000020 b acm_lock\n+ U calloc\n+ U close\n+ U connect\n+ U fclose\n+ U fopen\n+ U free\n+0000000000000000 b init.0\n+ U memcpy\n+ U pthread_mutex_lock\n+ U pthread_mutex_unlock\n+ U rdma_freeaddrinfo\n+ U rdmacore50_0_af_ib_support\n+0000000000000200 T rdmacore50_0_ucma_ib_cleanup\n+00000000000001e0 T rdmacore50_0_ucma_ib_init\n+0000000000000230 T rdmacore50_0_ucma_ib_resolve\n+ U rdmacore50_0_ucma_set_sid\n+ U recv\n+ U send\n+0000000000000004 b server_port\n+ U shutdown\n+0000000000000000 d sock\n+ U socket\n+ U strdup\n+0000000000000000 t ucma_ib_init.part.0\n+\n+indexer.c.o:\n+0000000000000000 r .LC0\n+0000000000000010 r .LC1\n+0000000000000020 r .LC2\n+ U __errno_location\n+ U calloc\n+0000000000000240 T rdmacore50_0_idm_clear\n+00000000000001b0 T rdmacore50_0_idm_set\n+0000000000000000 T rdmacore50_0_idx_insert\n+0000000000000160 T rdmacore50_0_idx_remove\n+0000000000000190 T rdmacore50_0_idx_replace\n"}, {"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,6 +1,6 @@\n ---------- 0 0 0 1684 1970-01-01 00:00:00.000000 /\n-?rw-r--r-- 0 0 0 2648 1970-01-01 00:00:00.000000 indexer.c.o\n-?rw-r--r-- 0 0 0 6768 1970-01-01 00:00:00.000000 acm.c.o\n ?rw-r--r-- 0 0 0 4992 1970-01-01 00:00:00.000000 addrinfo.c.o\n ?rw-r--r-- 0 0 0 62344 1970-01-01 00:00:00.000000 cma.c.o\n ?rw-r--r-- 0 0 0 82544 1970-01-01 00:00:00.000000 rsocket.c.o\n+?rw-r--r-- 0 0 0 6768 1970-01-01 00:00:00.000000 acm.c.o\n+?rw-r--r-- 0 0 0 2648 1970-01-01 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